commit | fc393b28ef56787819d848da95061ac7eabe5661 | [log] [tgz] |
---|---|---|
author | Weicai Yang <weicai@google.com> | Mon Aug 29 21:21:44 2022 -0700 |
committer | weicaiyang <49293026+weicaiyang@users.noreply.github.com> | Tue Aug 30 17:31:04 2022 -0700 |
tree | ac0a4db244420a374c1467f53d10190529c9c7e5 | |
parent | fe8a53a299d244d254b4a80eb83d8747d4c046a4 [diff] |
[spi_device/dv] Update scb to check upload related CSRs Scb updates: 1. Added checker for upload interrupt and upload status CSRs 2. Consolidated 2 types of queue for upload cmd/addr 3. Aligned with design change #14640 that last_read_addr is only updated in flash mode Minor sequence updates 1. Use a separate thread to read upload data and clear busy bit. Another thread to drive SPI command and wait for busy to clear 2. Skip reading upload status unless there is an upload interrupt, so that scb doesn't need to model upload status cycle accurately Signed-off-by: Weicai Yang <weicai@google.com>
OpenTitan is an open source silicon Root of Trust (RoT) project. OpenTitan will make the silicon RoT design and implementation more transparent, trustworthy, and secure for enterprises, platform providers, and chip manufacturers. OpenTitan is administered by lowRISC CIC as a collaborative project to produce high quality, open IP for instantiation as a full-featured product. See the OpenTitan site and OpenTitan docs for more information about the project.
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