commit fa5b5b6724be3c99cfa86f8e9276e3318c56e434
author Cindy Chen <chencindy@google.com> Wed May 05 11:04:27 2021 -0700
committer cindychip <cindy.chen0316@gmail.com> Wed May 05 18:08:50 2021 -0700
tree a3efd4627e9e6fd6ca3bff596fb18bd759ea0da0
parent 47a0f4798febd9e53dd131ef8c8c2b0255d8c139

[dv/lc_ctrl] Fix lc_ctrl regressin error

This PR fixed the regression assertion failure that caused by lc_ctrl
drives otp_inputs too late after reset.

This PR also fixes an issue with unmapped testnames.

Signed-off-by: Cindy Chen <chencindy@google.com>

hw/ip/lc_ctrl/data/lc_ctrl_testplan.hjson

diff --git a/hw/ip/lc_ctrl/data/lc_ctrl_testplan.hjson b/hw/ip/lc_ctrl/data/lc_ctrl_testplan.hjson
index 1471060..b5b902a 100644
--- a/hw/ip/lc_ctrl/data/lc_ctrl_testplan.hjson
+++ b/hw/ip/lc_ctrl/data/lc_ctrl_testplan.hjson
@@ -102,7 +102,7 @@
             - Check if lc_trans_cnt is incremented
             '''
       milestone: V2
-      tests: []
+      tests: ["lc_ctrl_errors"]
     }
     {
       name: security_escalation

hw/ip/lc_ctrl/dv/env/seq_lib/lc_ctrl_base_vseq.sv

diff --git a/hw/ip/lc_ctrl/dv/env/seq_lib/lc_ctrl_base_vseq.sv b/hw/ip/lc_ctrl/dv/env/seq_lib/lc_ctrl_base_vseq.sv
index 27d65ce..3cbdc80 100644
--- a/hw/ip/lc_ctrl/dv/env/seq_lib/lc_ctrl_base_vseq.sv
+++ b/hw/ip/lc_ctrl/dv/env/seq_lib/lc_ctrl_base_vseq.sv
@@ -25,6 +25,8 @@
   endtask
 
   virtual task dut_init(string reset_kind = "HARD");
+    // OTP inputs `lc_state` and `lc_cnt` need to be stable before lc_ctrl's reset is deasserted
+    if (do_lc_ctrl_init) drive_otp_i();
     super.dut_init();
     if (do_lc_ctrl_init) lc_ctrl_init();
   endtask
@@ -34,9 +36,8 @@
     // TODO
   endtask
 
-  // setup basic lc_ctrl features
-  virtual task lc_ctrl_init(bit rand_otp_i = 1);
-    cfg.pwr_lc_vif.drive_pin(LcPwrInitReq, 1);
+  // Drive OTP input `lc_state` and `lc_cnt`.
+  virtual task drive_otp_i(bit rand_otp_i = 1);
     if (rand_otp_i) begin
       `DV_CHECK_STD_RANDOMIZE_FATAL(lc_state)
       `DV_CHECK_STD_RANDOMIZE_WITH_FATAL(lc_cnt, (lc_state != LcStRaw) -> (lc_cnt != LcCnt0);)
@@ -45,13 +46,18 @@
       lc_cnt = LcCnt0;
     end
     cfg.lc_ctrl_vif.init(lc_state, lc_cnt);
+  endtask
+
+  // Drive LC init pin.
+  virtual task lc_ctrl_init();
+    cfg.pwr_lc_vif.drive_pin(LcPwrInitReq, 1);
     wait(cfg.pwr_lc_vif.pins[LcPwrDoneRsp] == 1);
     cfg.pwr_lc_vif.drive_pin(LcPwrInitReq, 0);
   endtask
 
   // some registers won't set to default value until otp_init is done
   virtual task read_and_check_all_csrs_after_reset();
-    lc_ctrl_init(0);
+    lc_ctrl_init();
     super.read_and_check_all_csrs_after_reset();
   endtask
 

hw/ip/lc_ctrl/dv/env/seq_lib/lc_ctrl_common_vseq.sv

diff --git a/hw/ip/lc_ctrl/dv/env/seq_lib/lc_ctrl_common_vseq.sv b/hw/ip/lc_ctrl/dv/env/seq_lib/lc_ctrl_common_vseq.sv
index d89fb9c..4fa30db 100644
--- a/hw/ip/lc_ctrl/dv/env/seq_lib/lc_ctrl_common_vseq.sv
+++ b/hw/ip/lc_ctrl/dv/env/seq_lib/lc_ctrl_common_vseq.sv
@@ -10,11 +10,6 @@
   }
   `uvm_object_new
 
-  virtual task dut_init(string reset_kind = "HARD");
-    super.dut_init();
-    if (do_lc_ctrl_init) lc_ctrl_init(0);
-  endtask
-
   virtual task body();
     run_common_vseq_wrapper(num_trans);
   endtask : body