commit | f83947635f4426de2117f6aa433065806eed9ca8 | [log] [tgz] |
---|---|---|
author | Pirmin Vogel <vogelpi@lowrisc.org> | Fri Feb 19 11:32:39 2021 +0100 |
committer | Pirmin Vogel <vogelpi@lowrisc.org> | Fri Feb 19 14:47:27 2021 +0100 |
tree | e36fe8d5d0896e7a36524a8d6bbfce27d4e46d3e | |
parent | 11880035e261cd9d6775de04cde17ebdbc8b41e2 [diff] |
[csrng] Select Canright S-Box implementation for AES cipher core This commit changes the default selection for the S-Box implementation inside the embedded AES cipher core from the LUT-based implementation the unmasked Canright design. This is more suitable for ASIC implementations because of the lower area footprint. The LUT-based implementation should be used for FPGA targets only. This change got already merged with lowRISC/OpenTitan#5215 but it got accidentally reverted when rebasing lowRISC/OpenTitan#5195. Signed-off-by: Pirmin Vogel <vogelpi@lowrisc.org>
OpenTitan is an open source silicon Root of Trust (RoT) project. OpenTitan will make the silicon RoT design and implementation more transparent, trustworthy, and secure for enterprises, platform providers, and chip manufacturers. OpenTitan is administered by lowRISC CIC as a collaborative project to produce high quality, open IP for instantiation as a full-featured product. See the OpenTitan site and OpenTitan docs for more information about the project.
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The project contains comprehensive documentation of all IPs and tools. You can access it online at docs.opentitan.org.
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