commit f6b1fd8ae5ff905dd2daa8e44d42508c1c3da9f3
author Miguel Osorio <miguelosorio@google.com> Tue Jul 27 14:57:42 2021 -0700
committer moidx <migue48@gmail.com> Tue Jul 27 18:37:21 2021 -0700
tree bed98b73d60df99605abae9cb180e0dbc4363ec2
parent 74d21e6ecda3773910bafb33bb92274afefc92a3

[hw/test] Disable dif_csrng_smoketest.

The smoketest fails to match the expected output for the generate
command even though the internal state `{K,V}` matches.

Signed-off-by: Miguel Osorio <miguelosorio@google.com>

hw/top_earlgrey/dv/chip_dif_tests.hjson

diff --git a/hw/top_earlgrey/dv/chip_dif_tests.hjson b/hw/top_earlgrey/dv/chip_dif_tests.hjson
index 313fa69..bbb8833 100644
--- a/hw/top_earlgrey/dv/chip_dif_tests.hjson
+++ b/hw/top_earlgrey/dv/chip_dif_tests.hjson
@@ -25,12 +25,13 @@
       sw_images: ["sw/device/tests/dif_clkmgr_smoketest:1"]
       en_run_modes: ["sw_test_mode"]
     }
-    {
-      name: chip_dif_csrng_smoketest
-      uvm_test_seq: chip_sw_base_vseq
-      sw_images: ["sw/device/tests/dif_csrng_smoketest:1"]
-      en_run_modes: ["sw_test_mode"]
-    }
+    // TODO(lowrisc/opentitan#7505): Debug CSRNG generate bits mismatch.
+    // {
+    //  name: chip_dif_csrng_smoketest
+    //  uvm_test_seq: chip_sw_base_vseq
+    //  sw_images: ["sw/device/tests/dif_csrng_smoketest:1"]
+    //  en_run_modes: ["sw_test_mode"]
+    // }
     {
       name: chip_dif_entropy_smoketest
       uvm_test_seq: chip_sw_base_vseq
@@ -117,7 +118,8 @@
       tests: ["chip_dif_aes_smoketest",
               "chip_dif_aon_timer_smoketest",
               "chip_dif_clkmgr_smoketest",
-              "chip_dif_csrng_smoketest",
+              // TODO(lowrisc/opentitan#7505): Debug CSRNG generate bits mismatch.
+              // "chip_dif_csrng_smoketest",
               "chip_dif_entropy_smoketest",
               "chip_dif_gpio_smoketest",
               "chip_dif_hmac_smoketest",