Enable ISR for chip_sw_sleep_pin_wake test
When device enters normal sleep mode, it is woke by any interrupts. This
commit enables ISR and PWRMGR AonWakeup interrupt to wake up from normal
sleep and check if the PINMUX wakes up the SW (Core) or not.
Signed-off-by: Eli Kim <eli@opentitan.org>
diff --git a/sw/device/tests/sim_dv/BUILD b/sw/device/tests/sim_dv/BUILD
index ed3e028..f785a65 100644
--- a/sw/device/tests/sim_dv/BUILD
+++ b/sw/device/tests/sim_dv/BUILD
@@ -635,13 +635,15 @@
deps = [
"//hw/top_earlgrey/sw/autogen:top_earlgrey",
"//sw/device/lib/base:mmio",
- "//sw/device/lib/dif:gpio",
"//sw/device/lib/dif:pinmux",
"//sw/device/lib/dif:pwrmgr",
"//sw/device/lib/dif:rv_plic",
+ "//sw/device/lib/runtime:irq",
"//sw/device/lib/runtime:log",
+ "//sw/device/lib/testing:isr_testutils",
"//sw/device/lib/testing:pwrmgr_testutils",
"//sw/device/lib/testing:rand_testutils",
+ "//sw/device/lib/testing:rv_plic_testutils",
"//sw/device/lib/testing/test_framework:ottf_main",
],
)
diff --git a/sw/device/tests/sim_dv/sleep_pin_wake_test.c b/sw/device/tests/sim_dv/sleep_pin_wake_test.c
index f5bf02b..d86139a 100644
--- a/sw/device/tests/sim_dv/sleep_pin_wake_test.c
+++ b/sw/device/tests/sim_dv/sleep_pin_wake_test.c
@@ -3,22 +3,26 @@
// SPDX-License-Identifier: Apache-2.0
#include "sw/device/lib/base/mmio.h"
-#include "sw/device/lib/dif/dif_gpio.h"
#include "sw/device/lib/dif/dif_pinmux.h"
#include "sw/device/lib/dif/dif_pwrmgr.h"
#include "sw/device/lib/dif/dif_rv_plic.h"
+#include "sw/device/lib/runtime/irq.h"
#include "sw/device/lib/runtime/log.h"
#include "sw/device/lib/testing/pwrmgr_testutils.h"
#include "sw/device/lib/testing/rand_testutils.h"
+#include "sw/device/lib/testing/rv_plic_testutils.h"
#include "sw/device/lib/testing/test_framework/check.h"
#include "sw/device/lib/testing/test_framework/ottf_main.h"
#include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"
+#include "sw/device/lib/testing/autogen/isr_testutils.h"
OTTF_DEFINE_TEST_CONFIG();
// PLIC structures
static const uint32_t kPlicTarget = kTopEarlgreyPlicTargetIbex0;
+static dif_pwrmgr_t pwrmgr;
+static dif_pinmux_t pinmux;
static dif_rv_plic_t plic;
// Volatile for vseq to assign random constant to select one of 8 MIO DIO
@@ -31,17 +35,41 @@
#define NUM_DIRECT_DIO 5
static const uint32_t kDirectDio[NUM_DIRECT_DIO] = {6, 12, 13, 14, 15};
-bool test_main(void) {
- dif_pwrmgr_t pwrmgr;
- dif_pinmux_t pinmux;
- dif_gpio_t gpio;
+static plic_isr_ctx_t plic_ctx = {.rv_plic = &plic,
+ .hart_id = kTopEarlgreyPlicTargetIbex0};
+static pwrmgr_isr_ctx_t pwrmgr_isr_ctx = {
+ .pwrmgr = &pwrmgr,
+ .plic_pwrmgr_start_irq_id = kTopEarlgreyPlicIrqIdPwrmgrAonWakeup,
+ .expected_irq = kDifPwrmgrIrqWakeup,
+ .is_only_irq = true};
+
+/**
+ * External interrupt handler.
+ */
+void ottf_external_isr(void) {
+ dif_pwrmgr_irq_t irq_id;
+ top_earlgrey_plic_peripheral_t peripheral;
+
+ isr_testutils_pwrmgr_isr(plic_ctx, pwrmgr_isr_ctx, &peripheral, &irq_id);
+
+ // Check that both the peripheral and the irq id is correct
+ CHECK(peripheral == kTopEarlgreyPlicPeripheralPwrmgrAon,
+ "IRQ peripheral: %d is incorrect", peripheral);
+ CHECK(irq_id == kDifPwrmgrIrqWakeup, "IRQ ID: %d is incorrect", irq_id);
+}
+
+bool test_main(void) {
dif_pinmux_index_t detector;
dif_pinmux_wakeup_config_t wakeup_cfg;
// Default Deep Power Down
dif_pwrmgr_domain_config_t pwrmgr_domain_cfg = 0;
+ // Enable global and external IRQ at Ibex.
+ irq_global_ctrl(true);
+ irq_external_ctrl(true);
+
// Initialize power manager
CHECK_DIF_OK(dif_pwrmgr_init(
mmio_region_from_addr(TOP_EARLGREY_PWRMGR_AON_BASE_ADDR), &pwrmgr));
@@ -62,6 +90,16 @@
uint32_t mio0_dio1 = rand_testutils_gen32_range(0, 1);
uint32_t pad_sel = 0;
+ // Enable AonWakeup Interrupt if normal sleep
+ if (deep_powerdown_en == 0) {
+ // Enable all the AON interrupts used in this test.
+ rv_plic_testutils_irq_range_enable(&plic, kTopEarlgreyPlicTargetIbex0,
+ kTopEarlgreyPlicIrqIdPwrmgrAonWakeup,
+ kTopEarlgreyPlicIrqIdPwrmgrAonWakeup);
+ // Enable pwrmgr interrupt
+ CHECK_DIF_OK(dif_pwrmgr_irq_set_enabled(&pwrmgr, 0, kDifToggleEnabled));
+ }
+
// SpiDev CLK(idx 12), CS#(idx 13), D0(idx 6) and SpiHost CLK (14), CS#
// (15) are directly connected to the SPI IF. Cannot control them. Roll 3
// less and compensated later.
@@ -108,11 +146,11 @@
LOG_INFO("Entering low power mode.");
wait_for_interrupt();
+ }
- // TODO: Check WAKEUP_INFO and pin wake
-
- } else if (pwrmgr_testutils_is_wakeup_reason(
- &pwrmgr, kDifPwrmgrWakeupRequestSourceThree)) {
+ // SW passed WFI() or wakeup from Deep Powerdown.
+ if (pwrmgr_testutils_is_wakeup_reason(&pwrmgr,
+ kDifPwrmgrWakeupRequestSourceThree)) {
// Pinmux wakeup
LOG_INFO("PINMUX PIN Wakeup");
@@ -120,8 +158,9 @@
return true;
} else {
- // Other wakeup. This is a failure.
dif_pwrmgr_wakeup_reason_t wakeup_reason;
+
+ // Other wakeup. This is a failure.
CHECK_DIF_OK(dif_pwrmgr_wakeup_reason_get(&pwrmgr, &wakeup_reason));
LOG_ERROR("Unexpected wakeup detected: type = %d, request_source = %d",
wakeup_reason.types, wakeup_reason.request_sources);
