| commit | f0a3019decf9163ee81d5f7fbdbad2520aaf03ca | [log] [tgz] |
|---|---|---|
| author | Greg Chadwick <gac@lowrisc.org> | Thu Aug 19 09:33:25 2021 +0100 |
| committer | Greg Chadwick <mail@gregchadwick.co.uk> | Mon Aug 23 15:00:53 2021 +0100 |
| tree | 18c2dd1089bf542f13b92aa0e3c67c453b4d797a | |
| parent | e8620dc24cbaaaeb413a79793e1167c4af62905e [diff] |
[otbn] Implement illegal bus access error & alert Any time the bus tries to access the OTBN memories whilst OTBN is active a fatal alert is triggered and OTBN halts immediately indicating an error. Fixes #7470 Fixes #2696 Signed-off-by: Greg Chadwick <gac@lowrisc.org>
OpenTitan is an open source silicon Root of Trust (RoT) project. OpenTitan will make the silicon RoT design and implementation more transparent, trustworthy, and secure for enterprises, platform providers, and chip manufacturers. OpenTitan is administered by lowRISC CIC as a collaborative project to produce high quality, open IP for instantiation as a full-featured product. See the OpenTitan site and OpenTitan docs for more information about the project.
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