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opensecura / 3p / lowrisc / opentitan / e97cac0f1658163802c6fafefbdb450b28e3bd7c / . / hw / ip / prim_xilinx / rtl
tree: 235422161b76fa1c981540252449fe3d0f42097b [path history] [tgz]
  1. prim_xilinx_clock_buf.sv
  2. prim_xilinx_clock_gating.sv
  3. prim_xilinx_clock_mux2.sv
  4. prim_xilinx_flop.sv
  5. prim_xilinx_pad_wrapper.sv