| commit | e8056bed2031088365b6f5a27b76f69b958240a3 | [log] [tgz] |
|---|---|---|
| author | Weicai Yang <weicai@google.com> | Mon Nov 15 16:32:16 2021 -0800 |
| committer | weicaiyang <49293026+weicaiyang@users.noreply.github.com> | Tue Nov 16 13:17:56 2021 -0800 |
| tree | 45a65e786f7c673c6ab07f9c42e2ad3c24440b3d | |
| parent | 84291ebf7c2a740ffdd4954de05431facbd63369 [diff] |
[dv] Change intg_err test from V3 to V2S Signed-off-by: Weicai Yang <weicai@google.com>
diff --git a/hw/dv/tools/dvsim/testplans/tl_device_access_types_testplan.hjson b/hw/dv/tools/dvsim/testplans/tl_device_access_types_testplan.hjson index 9af3dbb..5d1bebb 100644 --- a/hw/dv/tools/dvsim/testplans/tl_device_access_types_testplan.hjson +++ b/hw/dv/tools/dvsim/testplans/tl_device_access_types_testplan.hjson
@@ -60,7 +60,7 @@ Randomly inject errors on the control, data, or the ECC bits during CSR accesses. Verify that triggers the correct fatal alert.''' - milestone: V3 + milestone: V2S tests: ["{name}_tl_intg_err"] } ]