| commit | e5c765423b0dd29a1df919cf44c604d0805d9f83 | [log] [tgz] |
|---|---|---|
| author | Andreas Kurth <adk@lowrisc.org> | Wed Aug 31 09:53:22 2022 +0000 |
| committer | Greg Chadwick <mail@gregchadwick.co.uk> | Fri Sep 09 15:21:25 2022 +0100 |
| tree | b66285d8116b6b83ce8d960029e1aa3834be4bc6 | |
| parent | 4a61e10c20daf84cb897388fda0f4f93ed9b6b25 [diff] |
[otbn] Relax assertion for blanking of Adder Y For `BN.SUBM` with `a >= b` (thus the result of Adder X has the carry bit set), the result of Adder Y is not used, but it cannot be blanked solely based on the carry bit (see issue #14603). This commit relaxes the assertion that checks the blanking of Adder Y to allow this case, and thereby fixes #14603. Signed-off-by: Andreas Kurth <adk@lowrisc.org>
OpenTitan is an open source silicon Root of Trust (RoT) project. OpenTitan will make the silicon RoT design and implementation more transparent, trustworthy, and secure for enterprises, platform providers, and chip manufacturers. OpenTitan is administered by lowRISC CIC as a collaborative project to produce high quality, open IP for instantiation as a full-featured product. See the OpenTitan site and OpenTitan docs for more information about the project.
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Unless otherwise noted, everything in this repository is covered by the Apache License, Version 2.0 (see LICENSE for full text).