| commit | e496c109450a2b9932fa2f3dffc6fdd9eeb8fe3b | [log] [tgz] |
|---|---|---|
| author | Tung Hoang <hoang.tung@wdc.com> | Sat Aug 01 09:47:11 2020 -0700 |
| committer | weicaiyang <49293026+weicaiyang@users.noreply.github.com> | Mon Aug 17 16:09:04 2020 -0700 |
| tree | 3934b1b8952429c82ac818e400e9a794d02d5d02 | |
| parent | 9b53d2a389739c97cfcd596af764e89c240c39ef [diff] |
[i2c, dv] Update v1 and fixed issues in v2 for i2c_host dv - Decouple address and data phase for read transaction to utilize fmt_fifo bandwidth in i2c_sanity (v1) - Verify irq assertion on interrupt pins (instead of reading intr_state) in fifo_overflow_vseq and watermark_vseq (v2) - Fix issue in scoreboard to handle rx_fifo overflow (v2) Signed-off-by: Tung Hoang <hoang.tung@wdc.com>
OpenTitan is an open source silicon Root of Trust (RoT) project. OpenTitan will make the silicon RoT design and implementation more transparent, trustworthy, and secure for enterprises, platform providers, and chip manufacturers. OpenTitan is administered by lowRISC CIC as a collaborative project to produce high quality, open IP for instantiation as a full-featured product. See the OpenTitan site and OpenTitan docs for more information about the project.
This repository contains hardware, software and utilities written as part of the OpenTitan project. It is structured as monolithic repository, or “monorepo”, where all components live in one repository. It exists to enable collaboration across partners participating in the OpenTitan project.
The project contains comprehensive documentation of all IPs and tools. You can access it online at docs.opentitan.org.
Have a look at CONTRIBUTING for guidelines on how to contribute code to this repository.
Unless otherwise noted, everything in this repository is covered by the Apache License, Version 2.0 (see LICENSE for full text).