[tools] simple instructions for interactive synth
- The steps are still pretty manual and not ideal, but at least we can do it for now.
- Long term it may be good to have this built directly into dvsim with some kind of -interactive command.
Signed-off-by: Timothy Chen <timothytim@google.com>
diff --git a/hw/syn/README.md b/hw/syn/README.md
new file mode 100644
index 0000000..cb32c3a
--- /dev/null
+++ b/hw/syn/README.md
@@ -0,0 +1,43 @@
+# OpenTitan Synthesis Flow
+
+This readme gives some quick instructions on how to run synthesis in OpenTitan, using top_earlgrey as an example.
+
+## Normal Synthesis Through dvsim
+
+To run synthesis through dvsim, use a command like the following:
+
+```
+$ cd $REPO_TOP
+$ ./util/dvsim/dvsim.py -t dc hw/top_earlgrey/syn/chip_earlgrey_asic_syn_cfg.hjson --purge --local
+```
+
+This comment will invoke dvsim to run synthesis and terminate upon success or failure.
+The synthesis results are placed in the scratch area under `$SCRATCH_ROOT/{branch_name}/chip_earlgrey_asic-syn-dc/` for this example command.
+
+The main script that powers synthesis is `hw/syn/tools/dc/run-syn.tcl`.
+
+## Re-run Interactive Synthesis
+
+Assuming the above synthesis steps produces an error or creates a situation where we must run synthesis interactively for debug, it can be done as follows.
+
+When the normal synthesis steps are run (see example above), an output file called `env_variables.tcl` is created in the synthesis scratch area, `$SCRATCH_ROOT/{branch_name}/chip_earlgrey_asic-syn-dc/default` in the above example.
+
+To re-run this synthesis interactively, do the following:
+
+```
+$ cd $SCRATCH_ROOT/{branch_name}/chip_earlgrey_asic-syn-dc/default/syn-icarus
+$ dc_shell
+
+```
+
+The above command opens dc_shell in the scratch area.
+Once dc_shell is open, do the following:
+
+```
+$ source ../env_variables.tcl
+$ source $REPO_TOP/hw/syn/tools/dc/run-syn.tcl
+
+```
+
+Now, synthesis will begin again but will not exit dc_shell upon completion.
+If you do not wish for synthesis to run that far, `run_syn.tcl` can be directly modified to add or skip steps.
diff --git a/hw/syn/tools/dc/run-syn.tcl b/hw/syn/tools/dc/run-syn.tcl
index 96784aa..26d8e60 100644
--- a/hw/syn/tools/dc/run-syn.tcl
+++ b/hw/syn/tools/dc/run-syn.tcl
@@ -84,6 +84,21 @@
set PARAMS ""
###########################
+## Env var file ##
+###########################
+
+set fp [open "${BUILD_DIR}/env_variables.tcl" w+]
+puts $fp "set ::env(INTERACTIVE) 1"
+puts $fp "set ::env(syn_root) $syn_root"
+puts $fp "set ::env(foundry_root) $foundry_root"
+puts $fp "set ::env(SV_FLIST) $SV_FLIST"
+puts $fp "set ::env(BUILD_DIR) $BUILD_DIR"
+puts $fp "set ::env(DUT) $DUT"
+puts $fp "set ::env(CONSTRAINT) $CONSTRAINT"
+puts $fp "set ::env(FOUNDRY_CONSTRAINT) $FOUNDRY_CONSTRAINT"
+close $fp
+
+###########################
## ELABORATE DESIGN ##
###########################
