| commit | e278a60fd21d9d6df5a770051cf033b2ed87418f | [log] [tgz] |
|---|---|---|
| author | Timothy Chen <timothytim@google.com> | Tue May 10 14:13:32 2022 -0700 |
| committer | tjaychen <timothytim@google.com> | Thu May 12 07:48:09 2022 -0700 |
| tree | c20a6efdc6415f4c3bde1fc6ab307d65064e8127 | |
| parent | a0972df982296783342a55f3f06654173813bad9 [diff] |
[dv/flash_ctrl] Update region address check - the previous address range check was inclusive. Meaning if base is set to 0, and size set to 1, and access to access 1 would be "allowed". This is not the intended behavior. If base is set to 0, and size is set to 1, only accesses to 0 should be allowed, 1 and above would be disallowed. - the fix aligns the scoreboard / design behavior for the occassional flash_ctrl_mp failures. Signed-off-by: Timothy Chen <timothytim@google.com>
OpenTitan is an open source silicon Root of Trust (RoT) project. OpenTitan will make the silicon RoT design and implementation more transparent, trustworthy, and secure for enterprises, platform providers, and chip manufacturers. OpenTitan is administered by lowRISC CIC as a collaborative project to produce high quality, open IP for instantiation as a full-featured product. See the OpenTitan site and OpenTitan docs for more information about the project.
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