| commit | ef6576c9ff250f650be896ba269b1c84f32b037c | [log] [tgz] |
|---|---|---|
| author | Eunchan Kim <eunchan@opentitan.org> | Wed Aug 03 17:43:31 2022 -0700 |
| committer | Eli Kim <github@elikim.dev> | Tue Aug 09 14:01:30 2022 -0700 |
| tree | 1e288f7aab454a716970c49f1c08befac45d797c | |
| parent | 8c19c7f088c2463ad1351135d481d72eff396da4 [diff] |
feat(spid): Revise spi_tpm pre_dv Revised TPM module to issue more than 4 Byte TPM transfer. In this commit, I fixed a few TB issues, too. - The exit condition of SW was wrong. It created a TIMEOUT error in case of Xfer size is greater than 1B. - SW could not catch the Write data correctly due to race condition. Revised the TB to use `iff` rather than `&&` Signed-off-by: Eunchan Kim <eunchan@opentitan.org>
OpenTitan is an open source silicon Root of Trust (RoT) project. OpenTitan will make the silicon RoT design and implementation more transparent, trustworthy, and secure for enterprises, platform providers, and chip manufacturers. OpenTitan is administered by lowRISC CIC as a collaborative project to produce high quality, open IP for instantiation as a full-featured product. See the OpenTitan site and OpenTitan docs for more information about the project.
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