[rom_ctrl, dv] Added rom_ctrl_stress_all testcase
Added necessary changes in common files and rom_ctrl_stress_all_vseq
to execute rom_ctrl_stress_all
Signed-off-by: Prajwala Puttappa <prajwalaputtappa@lowrisc.org>
diff --git a/hw/ip/rom_ctrl/data/rom_ctrl_testplan.hjson b/hw/ip/rom_ctrl/data/rom_ctrl_testplan.hjson
index e4b52cd..e3135cb 100644
--- a/hw/ip/rom_ctrl/data/rom_ctrl_testplan.hjson
+++ b/hw/ip/rom_ctrl/data/rom_ctrl_testplan.hjson
@@ -45,20 +45,6 @@
}
{
- name: multiple_reset
- desc: '''
- Test where the design is reset many times and the rom is re-checked
-
- **Stimulus**:
- - Periodically reset the device to restart the rom check
-
- **Checks**:
- - Check that the digest csrs are not corrupted
- '''
- milestone: V2
- tests: []
- }
- {
name: corrupt_sig_fatal_chk
desc: '''
Corrupt integrity of signals like the select signal to addr mux.
@@ -69,6 +55,14 @@
milestone: V2S
tests: []
}
+ {
+ name: stress_all
+ desc: '''
+ - Combine above sequences in one test to run sequentially.
+ - Randomly add reset between each sequence'''
+ milestone: V2
+ tests: ["rom_ctrl_stress_all"]
+ }
]
covergroups: [
{
diff --git a/hw/ip/rom_ctrl/dv/env/rom_ctrl_env.core b/hw/ip/rom_ctrl/dv/env/rom_ctrl_env.core
index fef0aab..b6ee91e 100644
--- a/hw/ip/rom_ctrl/dv/env/rom_ctrl_env.core
+++ b/hw/ip/rom_ctrl/dv/env/rom_ctrl_env.core
@@ -27,6 +27,7 @@
- seq_lib/rom_ctrl_common_vseq.sv: {is_include_file: true}
- seq_lib/rom_ctrl_smoke_vseq.sv: {is_include_file: true}
- seq_lib/rom_ctrl_chk_successful_vseq.sv: {is_include_file: true}
+ - seq_lib/rom_ctrl_stress_all_vseq.sv: {is_include_file: true}
file_type: systemVerilogSource
generate:
diff --git a/hw/ip/rom_ctrl/dv/env/seq_lib/rom_ctrl_stress_all_vseq.sv b/hw/ip/rom_ctrl/dv/env/seq_lib/rom_ctrl_stress_all_vseq.sv
new file mode 100644
index 0000000..a390625
--- /dev/null
+++ b/hw/ip/rom_ctrl/dv/env/seq_lib/rom_ctrl_stress_all_vseq.sv
@@ -0,0 +1,41 @@
+// Copyright lowRISC contributors.
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+// combine all rom seqs in one seq to run sequentially
+class rom_ctrl_stress_all_vseq extends rom_ctrl_base_vseq;
+ `uvm_object_utils(rom_ctrl_stress_all_vseq)
+
+ `uvm_object_new
+
+ constraint num_trans_c {
+ num_trans inside {[3:6]};
+ }
+
+ task body();
+ string seq_names[] = {"rom_ctrl_smoke_vseq",
+ "rom_ctrl_common_vseq",
+ "rom_ctrl_chk_successful_vseq"};
+ for (int i = 1; i <= num_trans; i++) begin
+ uvm_sequence seq;
+ rom_ctrl_base_vseq rom_ctrl_vseq;
+ uint seq_idx = $urandom_range(0, seq_names.size - 1);
+ seq = create_seq_by_name(seq_names[seq_idx]);
+ `downcast(rom_ctrl_vseq, seq)
+
+ // if upper seq disables do_apply_reset for this seq, then can't issue reset
+ // as upper seq may drive reset
+ if (do_apply_reset) rom_ctrl_vseq.do_apply_reset = $urandom_range(0, 1);
+ else rom_ctrl_vseq.do_apply_reset = 0;
+ rom_ctrl_vseq.set_sequencer(p_sequencer);
+ `DV_CHECK_RANDOMIZE_FATAL(rom_ctrl_vseq)
+ if (seq_names[seq_idx] == "rom_ctrl_common_vseq") begin
+ rom_ctrl_common_vseq common_vseq;
+ `downcast(common_vseq, rom_ctrl_vseq);
+ common_vseq.common_seq_type = "intr_test";
+ end
+ rom_ctrl_vseq.start(p_sequencer);
+ end
+ endtask : body
+
+endclass
diff --git a/hw/ip/rom_ctrl/dv/env/seq_lib/rom_ctrl_vseq_list.sv b/hw/ip/rom_ctrl/dv/env/seq_lib/rom_ctrl_vseq_list.sv
index f97a39b..cbf10e7 100644
--- a/hw/ip/rom_ctrl/dv/env/seq_lib/rom_ctrl_vseq_list.sv
+++ b/hw/ip/rom_ctrl/dv/env/seq_lib/rom_ctrl_vseq_list.sv
@@ -6,3 +6,4 @@
`include "rom_ctrl_smoke_vseq.sv"
`include "rom_ctrl_common_vseq.sv"
`include "rom_ctrl_chk_successful_vseq.sv"
+`include "rom_ctrl_stress_all_vseq.sv"
diff --git a/hw/ip/rom_ctrl/dv/rom_ctrl_sim_cfg.hjson b/hw/ip/rom_ctrl/dv/rom_ctrl_sim_cfg.hjson
index ef3b04e..d7d4319 100644
--- a/hw/ip/rom_ctrl/dv/rom_ctrl_sim_cfg.hjson
+++ b/hw/ip/rom_ctrl/dv/rom_ctrl_sim_cfg.hjson
@@ -58,7 +58,11 @@
name: successful_rom_chk
uvm_test_seq: rom_ctrl_chk_successful_vseq
}
-
+ {
+ name: rom_ctrl_stress_all
+ uvm_test_seq: rom_ctrl_stress_all_vseq
+ }
+
// TODO: add more tests here
]
