[otp_ctrl] Allow partitions to absorb unallocated bits
- only creator/owner software partitions can absorb
unallocated bits.
Signed-off-by: Timothy Chen <timothytim@google.com>
diff --git a/hw/ip/otp_ctrl/data/otp_ctrl.hjson b/hw/ip/otp_ctrl/data/otp_ctrl.hjson
index 6347833..37b46be 100644
--- a/hw/ip/otp_ctrl/data/otp_ctrl.hjson
+++ b/hw/ip/otp_ctrl/data/otp_ctrl.hjson
@@ -174,7 +174,7 @@
{ name: "CreatorSwCfgSize",
desc: "Size of the CREATOR_SW_CFG partition",
type: "int",
- default: "768",
+ default: "800",
local: "true"
},
{ name: "CreatorSwCfgAstCfgOffset",
@@ -228,7 +228,7 @@
{ name: "CreatorSwCfgDigestOffset",
desc: "Offset of CREATOR_SW_CFG_DIGEST",
type: "int",
- default: "824",
+ default: "856",
local: "true"
},
{ name: "CreatorSwCfgDigestSize",
@@ -240,19 +240,19 @@
{ name: "OwnerSwCfgOffset",
desc: "Offset of the OWNER_SW_CFG partition",
type: "int",
- default: "832",
+ default: "864",
local: "true"
},
{ name: "OwnerSwCfgSize",
desc: "Size of the OWNER_SW_CFG partition",
type: "int",
- default: "768",
+ default: "800",
local: "true"
},
{ name: "RomErrorReportingOffset",
desc: "Offset of ROM_ERROR_REPORTING",
type: "int",
- default: "832",
+ default: "864",
local: "true"
},
{ name: "RomErrorReportingSize",
@@ -264,7 +264,7 @@
{ name: "RomBootstrapEnOffset",
desc: "Offset of ROM_BOOTSTRAP_EN",
type: "int",
- default: "836",
+ default: "868",
local: "true"
},
{ name: "RomBootstrapEnSize",
@@ -276,7 +276,7 @@
{ name: "RomFaultResponseOffset",
desc: "Offset of ROM_FAULT_RESPONSE",
type: "int",
- default: "840",
+ default: "872",
local: "true"
},
{ name: "RomFaultResponseSize",
@@ -288,7 +288,7 @@
{ name: "RomAlertClassEnOffset",
desc: "Offset of ROM_ALERT_CLASS_EN",
type: "int",
- default: "844",
+ default: "876",
local: "true"
},
{ name: "RomAlertClassEnSize",
@@ -300,7 +300,7 @@
{ name: "RomAlertEscalationOffset",
desc: "Offset of ROM_ALERT_ESCALATION",
type: "int",
- default: "848",
+ default: "880",
local: "true"
},
{ name: "RomAlertEscalationSize",
@@ -312,7 +312,7 @@
{ name: "RomAlertClassificationOffset",
desc: "Offset of ROM_ALERT_CLASSIFICATION",
type: "int",
- default: "852",
+ default: "884",
local: "true"
},
{ name: "RomAlertClassificationSize",
@@ -324,7 +324,7 @@
{ name: "RomLocalAlertClassificationOffset",
desc: "Offset of ROM_LOCAL_ALERT_CLASSIFICATION",
type: "int",
- default: "1172",
+ default: "1204",
local: "true"
},
{ name: "RomLocalAlertClassificationSize",
@@ -336,7 +336,7 @@
{ name: "RomAlertAccumThreshOffset",
desc: "Offset of ROM_ALERT_ACCUM_THRESH",
type: "int",
- default: "1236",
+ default: "1268",
local: "true"
},
{ name: "RomAlertAccumThreshSize",
@@ -348,7 +348,7 @@
{ name: "RomAlertTimeoutCyclesOffset",
desc: "Offset of ROM_ALERT_TIMEOUT_CYCLES",
type: "int",
- default: "1252",
+ default: "1284",
local: "true"
},
{ name: "RomAlertTimeoutCyclesSize",
@@ -360,7 +360,7 @@
{ name: "RomAlertPhaseCyclesOffset",
desc: "Offset of ROM_ALERT_PHASE_CYCLES",
type: "int",
- default: "1268",
+ default: "1300",
local: "true"
},
{ name: "RomAlertPhaseCyclesSize",
@@ -372,7 +372,7 @@
{ name: "OwnerSwCfgDigestOffset",
desc: "Offset of OWNER_SW_CFG_DIGEST",
type: "int",
- default: "1592",
+ default: "1656",
local: "true"
},
{ name: "OwnerSwCfgDigestSize",
@@ -384,7 +384,7 @@
{ name: "HwCfgOffset",
desc: "Offset of the HW_CFG partition",
type: "int",
- default: "1600",
+ default: "1664",
local: "true"
},
{ name: "HwCfgSize",
@@ -396,7 +396,7 @@
{ name: "DeviceIdOffset",
desc: "Offset of DEVICE_ID",
type: "int",
- default: "1600",
+ default: "1664",
local: "true"
},
{ name: "DeviceIdSize",
@@ -408,7 +408,7 @@
{ name: "ManufStateOffset",
desc: "Offset of MANUF_STATE",
type: "int",
- default: "1632",
+ default: "1696",
local: "true"
},
{ name: "ManufStateSize",
@@ -420,7 +420,7 @@
{ name: "EnSramIfetchOffset",
desc: "Offset of EN_SRAM_IFETCH",
type: "int",
- default: "1664",
+ default: "1728",
local: "true"
},
{ name: "EnSramIfetchSize",
@@ -432,7 +432,7 @@
{ name: "EnCsrngSwAppReadOffset",
desc: "Offset of EN_CSRNG_SW_APP_READ",
type: "int",
- default: "1665",
+ default: "1729",
local: "true"
},
{ name: "EnCsrngSwAppReadSize",
@@ -444,7 +444,7 @@
{ name: "EnEntropySrcFwReadOffset",
desc: "Offset of EN_ENTROPY_SRC_FW_READ",
type: "int",
- default: "1666",
+ default: "1730",
local: "true"
},
{ name: "EnEntropySrcFwReadSize",
@@ -456,7 +456,7 @@
{ name: "EnEntropySrcFwOverOffset",
desc: "Offset of EN_ENTROPY_SRC_FW_OVER",
type: "int",
- default: "1667",
+ default: "1731",
local: "true"
},
{ name: "EnEntropySrcFwOverSize",
@@ -468,7 +468,7 @@
{ name: "HwCfgDigestOffset",
desc: "Offset of HW_CFG_DIGEST",
type: "int",
- default: "1672",
+ default: "1736",
local: "true"
},
{ name: "HwCfgDigestSize",
@@ -480,7 +480,7 @@
{ name: "Secret0Offset",
desc: "Offset of the SECRET0 partition",
type: "int",
- default: "1680",
+ default: "1744",
local: "true"
},
{ name: "Secret0Size",
@@ -492,7 +492,7 @@
{ name: "TestUnlockTokenOffset",
desc: "Offset of TEST_UNLOCK_TOKEN",
type: "int",
- default: "1680",
+ default: "1744",
local: "true"
},
{ name: "TestUnlockTokenSize",
@@ -504,7 +504,7 @@
{ name: "TestExitTokenOffset",
desc: "Offset of TEST_EXIT_TOKEN",
type: "int",
- default: "1696",
+ default: "1760",
local: "true"
},
{ name: "TestExitTokenSize",
@@ -516,7 +516,7 @@
{ name: "Secret0DigestOffset",
desc: "Offset of SECRET0_DIGEST",
type: "int",
- default: "1712",
+ default: "1776",
local: "true"
},
{ name: "Secret0DigestSize",
@@ -528,7 +528,7 @@
{ name: "Secret1Offset",
desc: "Offset of the SECRET1 partition",
type: "int",
- default: "1720",
+ default: "1784",
local: "true"
},
{ name: "Secret1Size",
@@ -540,7 +540,7 @@
{ name: "FlashAddrKeySeedOffset",
desc: "Offset of FLASH_ADDR_KEY_SEED",
type: "int",
- default: "1720",
+ default: "1784",
local: "true"
},
{ name: "FlashAddrKeySeedSize",
@@ -552,7 +552,7 @@
{ name: "FlashDataKeySeedOffset",
desc: "Offset of FLASH_DATA_KEY_SEED",
type: "int",
- default: "1752",
+ default: "1816",
local: "true"
},
{ name: "FlashDataKeySeedSize",
@@ -564,7 +564,7 @@
{ name: "SramDataKeySeedOffset",
desc: "Offset of SRAM_DATA_KEY_SEED",
type: "int",
- default: "1784",
+ default: "1848",
local: "true"
},
{ name: "SramDataKeySeedSize",
@@ -576,7 +576,7 @@
{ name: "Secret1DigestOffset",
desc: "Offset of SECRET1_DIGEST",
type: "int",
- default: "1800",
+ default: "1864",
local: "true"
},
{ name: "Secret1DigestSize",
@@ -588,7 +588,7 @@
{ name: "Secret2Offset",
desc: "Offset of the SECRET2 partition",
type: "int",
- default: "1808",
+ default: "1872",
local: "true"
},
{ name: "Secret2Size",
@@ -600,7 +600,7 @@
{ name: "RmaTokenOffset",
desc: "Offset of RMA_TOKEN",
type: "int",
- default: "1808",
+ default: "1872",
local: "true"
},
{ name: "RmaTokenSize",
@@ -612,7 +612,7 @@
{ name: "CreatorRootKeyShare0Offset",
desc: "Offset of CREATOR_ROOT_KEY_SHARE0",
type: "int",
- default: "1824",
+ default: "1888",
local: "true"
},
{ name: "CreatorRootKeyShare0Size",
@@ -624,7 +624,7 @@
{ name: "CreatorRootKeyShare1Offset",
desc: "Offset of CREATOR_ROOT_KEY_SHARE1",
type: "int",
- default: "1856",
+ default: "1920",
local: "true"
},
{ name: "CreatorRootKeyShare1Size",
@@ -636,7 +636,7 @@
{ name: "Secret2DigestOffset",
desc: "Offset of SECRET2_DIGEST",
type: "int",
- default: "1888",
+ default: "1952",
local: "true"
},
{ name: "Secret2DigestSize",
@@ -648,7 +648,7 @@
{ name: "LifeCycleOffset",
desc: "Offset of the LIFE_CYCLE partition",
type: "int",
- default: "1896",
+ default: "1960",
local: "true"
},
{ name: "LifeCycleSize",
@@ -660,7 +660,7 @@
{ name: "LcTransitionCntOffset",
desc: "Offset of LC_TRANSITION_CNT",
type: "int",
- default: "1896",
+ default: "1960",
local: "true"
},
{ name: "LcTransitionCntSize",
@@ -672,7 +672,7 @@
{ name: "LcStateOffset",
desc: "Offset of LC_STATE",
type: "int",
- default: "1944",
+ default: "2008",
local: "true"
},
{ name: "LcStateSize",
diff --git a/hw/ip/otp_ctrl/data/otp_ctrl_mmap.hjson b/hw/ip/otp_ctrl/data/otp_ctrl_mmap.hjson
index b8508ec..e5ec3a0 100644
--- a/hw/ip/otp_ctrl/data/otp_ctrl_mmap.hjson
+++ b/hw/ip/otp_ctrl/data/otp_ctrl_mmap.hjson
@@ -100,7 +100,7 @@
{
name: "CREATOR_SW_CFG",
variant: "Unbuffered",
- //absorb: true,
+ absorb: true,
size: "768", // in bytes
secret: false,
sw_digest: true,
@@ -136,7 +136,7 @@
{
name: "OWNER_SW_CFG",
variant: "Unbuffered",
- //absorb: true,
+ absorb: true,
size: "768", // in bytes
secret: false,
sw_digest: true,
diff --git a/hw/ip/otp_ctrl/doc/otp_ctrl_mmap.md b/hw/ip/otp_ctrl/doc/otp_ctrl_mmap.md
index fe2bfa2..8dd643e 100644
--- a/hw/ip/otp_ctrl/doc/otp_ctrl_mmap.md
+++ b/hw/ip/otp_ctrl/doc/otp_ctrl_mmap.md
@@ -7,39 +7,39 @@
|:-------:|:--------------:|:----------:|:----------------:|:-----------------------------------------------------:|:--------------:|:----------:|
| 0 | VENDOR_TEST | 64 | 32bit | SCRATCH | 0x000 | 56 |
| | | | 64bit | [VENDOR_TEST_DIGEST](#Reg_vendor_test_digest_0) | 0x038 | 8 |
-| 1 | CREATOR_SW_CFG | 768 | 32bit | CREATOR_SW_CFG_AST_CFG | 0x040 | 256 |
+| 1 | CREATOR_SW_CFG | 800 | 32bit | CREATOR_SW_CFG_AST_CFG | 0x040 | 256 |
| | | | 32bit | CREATOR_SW_CFG_ROM_EXT_SKU | 0x140 | 4 |
| | | | 32bit | CREATOR_SW_CFG_USE_SW_RSA_VERIFY | 0x144 | 4 |
| | | | 32bit | CREATOR_SW_CFG_KEY_IS_VALID | 0x148 | 8 |
-| | | | 64bit | [CREATOR_SW_CFG_DIGEST](#Reg_creator_sw_cfg_digest_0) | 0x338 | 8 |
-| 2 | OWNER_SW_CFG | 768 | 32bit | ROM_ERROR_REPORTING | 0x340 | 4 |
-| | | | 32bit | ROM_BOOTSTRAP_EN | 0x344 | 4 |
-| | | | 32bit | ROM_FAULT_RESPONSE | 0x348 | 4 |
-| | | | 32bit | ROM_ALERT_CLASS_EN | 0x34C | 4 |
-| | | | 32bit | ROM_ALERT_ESCALATION | 0x350 | 4 |
-| | | | 32bit | ROM_ALERT_CLASSIFICATION | 0x354 | 320 |
-| | | | 32bit | ROM_LOCAL_ALERT_CLASSIFICATION | 0x494 | 64 |
-| | | | 32bit | ROM_ALERT_ACCUM_THRESH | 0x4D4 | 16 |
-| | | | 32bit | ROM_ALERT_TIMEOUT_CYCLES | 0x4E4 | 16 |
-| | | | 32bit | ROM_ALERT_PHASE_CYCLES | 0x4F4 | 64 |
-| | | | 64bit | [OWNER_SW_CFG_DIGEST](#Reg_owner_sw_cfg_digest_0) | 0x638 | 8 |
-| 3 | HW_CFG | 80 | 32bit | DEVICE_ID | 0x640 | 32 |
-| | | | 32bit | MANUF_STATE | 0x660 | 32 |
-| | | | 32bit | EN_SRAM_IFETCH | 0x680 | 1 |
-| | | | 32bit | EN_CSRNG_SW_APP_READ | 0x681 | 1 |
-| | | | 32bit | EN_ENTROPY_SRC_FW_READ | 0x682 | 1 |
-| | | | 32bit | EN_ENTROPY_SRC_FW_OVER | 0x683 | 1 |
-| | | | 64bit | [HW_CFG_DIGEST](#Reg_hw_cfg_digest_0) | 0x688 | 8 |
-| 4 | SECRET0 | 40 | 64bit | TEST_UNLOCK_TOKEN | 0x690 | 16 |
-| | | | 64bit | TEST_EXIT_TOKEN | 0x6A0 | 16 |
-| | | | 64bit | [SECRET0_DIGEST](#Reg_secret0_digest_0) | 0x6B0 | 8 |
-| 5 | SECRET1 | 88 | 64bit | FLASH_ADDR_KEY_SEED | 0x6B8 | 32 |
-| | | | 64bit | FLASH_DATA_KEY_SEED | 0x6D8 | 32 |
-| | | | 64bit | SRAM_DATA_KEY_SEED | 0x6F8 | 16 |
-| | | | 64bit | [SECRET1_DIGEST](#Reg_secret1_digest_0) | 0x708 | 8 |
-| 6 | SECRET2 | 88 | 64bit | RMA_TOKEN | 0x710 | 16 |
-| | | | 64bit | CREATOR_ROOT_KEY_SHARE0 | 0x720 | 32 |
-| | | | 64bit | CREATOR_ROOT_KEY_SHARE1 | 0x740 | 32 |
-| | | | 64bit | [SECRET2_DIGEST](#Reg_secret2_digest_0) | 0x760 | 8 |
-| 7 | LIFE_CYCLE | 88 | 32bit | LC_TRANSITION_CNT | 0x768 | 48 |
-| | | | 32bit | LC_STATE | 0x798 | 40 |
\ No newline at end of file
+| | | | 64bit | [CREATOR_SW_CFG_DIGEST](#Reg_creator_sw_cfg_digest_0) | 0x358 | 8 |
+| 2 | OWNER_SW_CFG | 800 | 32bit | ROM_ERROR_REPORTING | 0x360 | 4 |
+| | | | 32bit | ROM_BOOTSTRAP_EN | 0x364 | 4 |
+| | | | 32bit | ROM_FAULT_RESPONSE | 0x368 | 4 |
+| | | | 32bit | ROM_ALERT_CLASS_EN | 0x36C | 4 |
+| | | | 32bit | ROM_ALERT_ESCALATION | 0x370 | 4 |
+| | | | 32bit | ROM_ALERT_CLASSIFICATION | 0x374 | 320 |
+| | | | 32bit | ROM_LOCAL_ALERT_CLASSIFICATION | 0x4B4 | 64 |
+| | | | 32bit | ROM_ALERT_ACCUM_THRESH | 0x4F4 | 16 |
+| | | | 32bit | ROM_ALERT_TIMEOUT_CYCLES | 0x504 | 16 |
+| | | | 32bit | ROM_ALERT_PHASE_CYCLES | 0x514 | 64 |
+| | | | 64bit | [OWNER_SW_CFG_DIGEST](#Reg_owner_sw_cfg_digest_0) | 0x678 | 8 |
+| 3 | HW_CFG | 80 | 32bit | DEVICE_ID | 0x680 | 32 |
+| | | | 32bit | MANUF_STATE | 0x6A0 | 32 |
+| | | | 32bit | EN_SRAM_IFETCH | 0x6C0 | 1 |
+| | | | 32bit | EN_CSRNG_SW_APP_READ | 0x6C1 | 1 |
+| | | | 32bit | EN_ENTROPY_SRC_FW_READ | 0x6C2 | 1 |
+| | | | 32bit | EN_ENTROPY_SRC_FW_OVER | 0x6C3 | 1 |
+| | | | 64bit | [HW_CFG_DIGEST](#Reg_hw_cfg_digest_0) | 0x6C8 | 8 |
+| 4 | SECRET0 | 40 | 64bit | TEST_UNLOCK_TOKEN | 0x6D0 | 16 |
+| | | | 64bit | TEST_EXIT_TOKEN | 0x6E0 | 16 |
+| | | | 64bit | [SECRET0_DIGEST](#Reg_secret0_digest_0) | 0x6F0 | 8 |
+| 5 | SECRET1 | 88 | 64bit | FLASH_ADDR_KEY_SEED | 0x6F8 | 32 |
+| | | | 64bit | FLASH_DATA_KEY_SEED | 0x718 | 32 |
+| | | | 64bit | SRAM_DATA_KEY_SEED | 0x738 | 16 |
+| | | | 64bit | [SECRET1_DIGEST](#Reg_secret1_digest_0) | 0x748 | 8 |
+| 6 | SECRET2 | 88 | 64bit | RMA_TOKEN | 0x750 | 16 |
+| | | | 64bit | CREATOR_ROOT_KEY_SHARE0 | 0x760 | 32 |
+| | | | 64bit | CREATOR_ROOT_KEY_SHARE1 | 0x780 | 32 |
+| | | | 64bit | [SECRET2_DIGEST](#Reg_secret2_digest_0) | 0x7A0 | 8 |
+| 7 | LIFE_CYCLE | 88 | 32bit | LC_TRANSITION_CNT | 0x7A8 | 48 |
+| | | | 32bit | LC_STATE | 0x7D8 | 40 |
\ No newline at end of file
diff --git a/hw/ip/otp_ctrl/rtl/otp_ctrl_part_pkg.sv b/hw/ip/otp_ctrl/rtl/otp_ctrl_part_pkg.sv
index 95cf331..06af912 100644
--- a/hw/ip/otp_ctrl/rtl/otp_ctrl_part_pkg.sv
+++ b/hw/ip/otp_ctrl/rtl/otp_ctrl_part_pkg.sv
@@ -131,7 +131,7 @@
'{
variant: Unbuffered,
offset: 11'd64,
- size: 768,
+ size: 800,
key_sel: key_sel_e'('0),
secret: 1'b0,
hw_digest: 1'b0,
@@ -142,8 +142,8 @@
// OWNER_SW_CFG
'{
variant: Unbuffered,
- offset: 11'd832,
- size: 768,
+ offset: 11'd864,
+ size: 800,
key_sel: key_sel_e'('0),
secret: 1'b0,
hw_digest: 1'b0,
@@ -154,7 +154,7 @@
// HW_CFG
'{
variant: Buffered,
- offset: 11'd1600,
+ offset: 11'd1664,
size: 80,
key_sel: key_sel_e'('0),
secret: 1'b0,
@@ -166,7 +166,7 @@
// SECRET0
'{
variant: Buffered,
- offset: 11'd1680,
+ offset: 11'd1744,
size: 40,
key_sel: Secret0Key,
secret: 1'b1,
@@ -178,7 +178,7 @@
// SECRET1
'{
variant: Buffered,
- offset: 11'd1720,
+ offset: 11'd1784,
size: 88,
key_sel: Secret1Key,
secret: 1'b1,
@@ -190,7 +190,7 @@
// SECRET2
'{
variant: Buffered,
- offset: 11'd1808,
+ offset: 11'd1872,
size: 88,
key_sel: Secret2Key,
secret: 1'b1,
@@ -202,7 +202,7 @@
// LIFE_CYCLE
'{
variant: LifeCycle,
- offset: 11'd1896,
+ offset: 11'd1960,
size: 88,
key_sel: key_sel_e'('0),
secret: 1'b0,
@@ -270,7 +270,7 @@
};
// OTP invalid partition default for buffered partitions.
- parameter logic [15871:0] PartInvDefault = 15872'({
+ parameter logic [16383:0] PartInvDefault = 16384'({
704'({
320'hDAAF8720F255C5C84D1D9C10648A878DB1D5ABE9610E8395490EC23C0A1EDCCE280E8ECA88CEA2E9,
384'h9470329E17324EDB1E2960279AB8F882A991BEA2CF16541724A52D80A891BCD52BE973D4C5752E3A6912899150240B3A
@@ -302,9 +302,9 @@
256'h41389646B3968A3B128F4AF0AFFC1AAC77ADEFF42376E09D523D5C06786AAC34,
256'hFA53B8058E157CB69F1F413E87242971B6B52A656A1CAB7FEBF21E5BF1F45EDD
}),
- 6144'({
+ 6400'({
64'h39EB436F1D5AF2D7,
- 2080'h0, // unallocated space
+ 2336'h0, // unallocated space
512'h0,
128'h0,
128'h0,
@@ -316,9 +316,9 @@
32'h0,
32'h0
}),
- 6144'({
+ 6400'({
64'h7D7EA64D850E128D,
- 3904'h0, // unallocated space
+ 4160'h0, // unallocated space
64'h0,
32'h0,
32'h0,
diff --git a/hw/ip/otp_ctrl/rtl/otp_ctrl_reg_pkg.sv b/hw/ip/otp_ctrl/rtl/otp_ctrl_reg_pkg.sv
index ab67607..639ffec 100644
--- a/hw/ip/otp_ctrl/rtl/otp_ctrl_reg_pkg.sv
+++ b/hw/ip/otp_ctrl/rtl/otp_ctrl_reg_pkg.sv
@@ -22,7 +22,7 @@
parameter int VendorTestDigestOffset = 56;
parameter int VendorTestDigestSize = 8;
parameter int CreatorSwCfgOffset = 64;
- parameter int CreatorSwCfgSize = 768;
+ parameter int CreatorSwCfgSize = 800;
parameter int CreatorSwCfgAstCfgOffset = 64;
parameter int CreatorSwCfgAstCfgSize = 256;
parameter int CreatorSwCfgRomExtSkuOffset = 320;
@@ -31,81 +31,81 @@
parameter int CreatorSwCfgUseSwRsaVerifySize = 4;
parameter int CreatorSwCfgKeyIsValidOffset = 328;
parameter int CreatorSwCfgKeyIsValidSize = 8;
- parameter int CreatorSwCfgDigestOffset = 824;
+ parameter int CreatorSwCfgDigestOffset = 856;
parameter int CreatorSwCfgDigestSize = 8;
- parameter int OwnerSwCfgOffset = 832;
- parameter int OwnerSwCfgSize = 768;
- parameter int RomErrorReportingOffset = 832;
+ parameter int OwnerSwCfgOffset = 864;
+ parameter int OwnerSwCfgSize = 800;
+ parameter int RomErrorReportingOffset = 864;
parameter int RomErrorReportingSize = 4;
- parameter int RomBootstrapEnOffset = 836;
+ parameter int RomBootstrapEnOffset = 868;
parameter int RomBootstrapEnSize = 4;
- parameter int RomFaultResponseOffset = 840;
+ parameter int RomFaultResponseOffset = 872;
parameter int RomFaultResponseSize = 4;
- parameter int RomAlertClassEnOffset = 844;
+ parameter int RomAlertClassEnOffset = 876;
parameter int RomAlertClassEnSize = 4;
- parameter int RomAlertEscalationOffset = 848;
+ parameter int RomAlertEscalationOffset = 880;
parameter int RomAlertEscalationSize = 4;
- parameter int RomAlertClassificationOffset = 852;
+ parameter int RomAlertClassificationOffset = 884;
parameter int RomAlertClassificationSize = 320;
- parameter int RomLocalAlertClassificationOffset = 1172;
+ parameter int RomLocalAlertClassificationOffset = 1204;
parameter int RomLocalAlertClassificationSize = 64;
- parameter int RomAlertAccumThreshOffset = 1236;
+ parameter int RomAlertAccumThreshOffset = 1268;
parameter int RomAlertAccumThreshSize = 16;
- parameter int RomAlertTimeoutCyclesOffset = 1252;
+ parameter int RomAlertTimeoutCyclesOffset = 1284;
parameter int RomAlertTimeoutCyclesSize = 16;
- parameter int RomAlertPhaseCyclesOffset = 1268;
+ parameter int RomAlertPhaseCyclesOffset = 1300;
parameter int RomAlertPhaseCyclesSize = 64;
- parameter int OwnerSwCfgDigestOffset = 1592;
+ parameter int OwnerSwCfgDigestOffset = 1656;
parameter int OwnerSwCfgDigestSize = 8;
- parameter int HwCfgOffset = 1600;
+ parameter int HwCfgOffset = 1664;
parameter int HwCfgSize = 80;
- parameter int DeviceIdOffset = 1600;
+ parameter int DeviceIdOffset = 1664;
parameter int DeviceIdSize = 32;
- parameter int ManufStateOffset = 1632;
+ parameter int ManufStateOffset = 1696;
parameter int ManufStateSize = 32;
- parameter int EnSramIfetchOffset = 1664;
+ parameter int EnSramIfetchOffset = 1728;
parameter int EnSramIfetchSize = 1;
- parameter int EnCsrngSwAppReadOffset = 1665;
+ parameter int EnCsrngSwAppReadOffset = 1729;
parameter int EnCsrngSwAppReadSize = 1;
- parameter int EnEntropySrcFwReadOffset = 1666;
+ parameter int EnEntropySrcFwReadOffset = 1730;
parameter int EnEntropySrcFwReadSize = 1;
- parameter int EnEntropySrcFwOverOffset = 1667;
+ parameter int EnEntropySrcFwOverOffset = 1731;
parameter int EnEntropySrcFwOverSize = 1;
- parameter int HwCfgDigestOffset = 1672;
+ parameter int HwCfgDigestOffset = 1736;
parameter int HwCfgDigestSize = 8;
- parameter int Secret0Offset = 1680;
+ parameter int Secret0Offset = 1744;
parameter int Secret0Size = 40;
- parameter int TestUnlockTokenOffset = 1680;
+ parameter int TestUnlockTokenOffset = 1744;
parameter int TestUnlockTokenSize = 16;
- parameter int TestExitTokenOffset = 1696;
+ parameter int TestExitTokenOffset = 1760;
parameter int TestExitTokenSize = 16;
- parameter int Secret0DigestOffset = 1712;
+ parameter int Secret0DigestOffset = 1776;
parameter int Secret0DigestSize = 8;
- parameter int Secret1Offset = 1720;
+ parameter int Secret1Offset = 1784;
parameter int Secret1Size = 88;
- parameter int FlashAddrKeySeedOffset = 1720;
+ parameter int FlashAddrKeySeedOffset = 1784;
parameter int FlashAddrKeySeedSize = 32;
- parameter int FlashDataKeySeedOffset = 1752;
+ parameter int FlashDataKeySeedOffset = 1816;
parameter int FlashDataKeySeedSize = 32;
- parameter int SramDataKeySeedOffset = 1784;
+ parameter int SramDataKeySeedOffset = 1848;
parameter int SramDataKeySeedSize = 16;
- parameter int Secret1DigestOffset = 1800;
+ parameter int Secret1DigestOffset = 1864;
parameter int Secret1DigestSize = 8;
- parameter int Secret2Offset = 1808;
+ parameter int Secret2Offset = 1872;
parameter int Secret2Size = 88;
- parameter int RmaTokenOffset = 1808;
+ parameter int RmaTokenOffset = 1872;
parameter int RmaTokenSize = 16;
- parameter int CreatorRootKeyShare0Offset = 1824;
+ parameter int CreatorRootKeyShare0Offset = 1888;
parameter int CreatorRootKeyShare0Size = 32;
- parameter int CreatorRootKeyShare1Offset = 1856;
+ parameter int CreatorRootKeyShare1Offset = 1920;
parameter int CreatorRootKeyShare1Size = 32;
- parameter int Secret2DigestOffset = 1888;
+ parameter int Secret2DigestOffset = 1952;
parameter int Secret2DigestSize = 8;
- parameter int LifeCycleOffset = 1896;
+ parameter int LifeCycleOffset = 1960;
parameter int LifeCycleSize = 88;
- parameter int LcTransitionCntOffset = 1896;
+ parameter int LcTransitionCntOffset = 1960;
parameter int LcTransitionCntSize = 48;
- parameter int LcStateOffset = 1944;
+ parameter int LcStateOffset = 2008;
parameter int LcStateSize = 40;
parameter int NumAlerts = 3;
diff --git a/sw/device/lib/dif/dif_otp_ctrl_unittest.cc b/sw/device/lib/dif/dif_otp_ctrl_unittest.cc
index 8bb5833..7c9c63f 100644
--- a/sw/device/lib/dif/dif_otp_ctrl_unittest.cc
+++ b/sw/device/lib/dif/dif_otp_ctrl_unittest.cc
@@ -391,7 +391,7 @@
EXPECT_READ32(
OTP_CTRL_DIRECT_ACCESS_REGWEN_REG_OFFSET,
{{OTP_CTRL_DIRECT_ACCESS_REGWEN_DIRECT_ACCESS_REGWEN_BIT, true}});
- EXPECT_WRITE32(OTP_CTRL_DIRECT_ACCESS_ADDRESS_REG_OFFSET, 0x660);
+ EXPECT_WRITE32(OTP_CTRL_DIRECT_ACCESS_ADDRESS_REG_OFFSET, 0x6a0);
EXPECT_WRITE32(OTP_CTRL_DIRECT_ACCESS_CMD_REG_OFFSET,
{{OTP_CTRL_DIRECT_ACCESS_CMD_RD_BIT, true}});
@@ -489,7 +489,7 @@
EXPECT_READ32(
OTP_CTRL_DIRECT_ACCESS_REGWEN_REG_OFFSET,
{{OTP_CTRL_DIRECT_ACCESS_REGWEN_DIRECT_ACCESS_REGWEN_BIT, true}});
- EXPECT_WRITE32(OTP_CTRL_DIRECT_ACCESS_ADDRESS_REG_OFFSET, 0x660);
+ EXPECT_WRITE32(OTP_CTRL_DIRECT_ACCESS_ADDRESS_REG_OFFSET, 0x6a0);
EXPECT_WRITE32(OTP_CTRL_DIRECT_ACCESS_WDATA_0_REG_OFFSET, 0x12345678);
EXPECT_WRITE32(OTP_CTRL_DIRECT_ACCESS_CMD_REG_OFFSET,
{{OTP_CTRL_DIRECT_ACCESS_CMD_WR_BIT, true}});
@@ -542,7 +542,7 @@
TEST_F(DaiProgramTest, OutOfRange) {
// Check that we can't write a digest directly.
EXPECT_EQ(dif_otp_ctrl_dai_program32(&otp_, kDifOtpCtrlPartitionCreatorSwCfg,
- /*address=*/0x2f8, /*value=*/42),
+ /*address=*/0x338, /*value=*/42),
kDifOtpCtrlDaiOutOfRange);
// Same digest check for 64-bit.
@@ -597,7 +597,7 @@
EXPECT_READ32(
OTP_CTRL_DIRECT_ACCESS_REGWEN_REG_OFFSET,
{{OTP_CTRL_DIRECT_ACCESS_REGWEN_DIRECT_ACCESS_REGWEN_BIT, true}});
- EXPECT_WRITE32(OTP_CTRL_DIRECT_ACCESS_ADDRESS_REG_OFFSET, 0x640);
+ EXPECT_WRITE32(OTP_CTRL_DIRECT_ACCESS_ADDRESS_REG_OFFSET, 0x680);
EXPECT_WRITE32(OTP_CTRL_DIRECT_ACCESS_CMD_REG_OFFSET,
{{OTP_CTRL_DIRECT_ACCESS_CMD_DIGEST_BIT, true}});
@@ -759,7 +759,7 @@
0x300, buf.data(), buf.size()),
kDifOtpCtrlDaiOutOfRange);
EXPECT_EQ(dif_otp_ctrl_read_blocking(&otp_, kDifOtpCtrlPartitionOwnerSwCfg,
- 0x10, buf.data(), 0x2f0),
+ 0x10, buf.data(), 0x330),
kDifOtpCtrlDaiOutOfRange);
}
