[top] top level updates to enable sensor_ctrl / ast integration Signed-off-by: Timothy Chen <timothytim@google.com> [top] add sensor_ctrl to tlul inter-module Signed-off-by: Timothy Chen <timothytim@google.com> [top] top_earlgrey.hjson update for inter-module-ext Signed-off-by: Timothy Chen <timothytim@google.com>
diff --git a/hw/top_earlgrey/data/top_earlgrey.hjson b/hw/top_earlgrey/data/top_earlgrey.hjson index d6949c7..b8904f4 100644 --- a/hw/top_earlgrey/data/top_earlgrey.hjson +++ b/hw/top_earlgrey/data/top_earlgrey.hjson
@@ -119,6 +119,8 @@ // `module` defines the peripherals. // Details are coming from each modules' config file `ip.hjson` // TODO: Define parameter here + // generated: A module is templated and generated as part of topgen + // top_only: A module is not templated but is specific to 'top_*' instead of 'ip' module: [ { name: "uart", // instance name type: "uart", // Must be matched to the ip name in `ip.hson` (_reg, _cfg permitted) @@ -261,6 +263,14 @@ reset_connections: {rst_ni: "sys_io", rst_usb_48mhz_ni: "usb"}, base_addr: "0x40150000", }, + { name: "sensor_ctrl", + type: "sensor_ctrl", + clock_srcs: {clk_i: "io"}, + clock_group: "secure", + reset_connections: {rst_ni: "sys_io"}, + base_addr: "0x40170000", + top_only: "true" + }, { name: "otbn", type: "otbn", clock_srcs: {clk_i: "main"}, @@ -357,7 +367,6 @@ 'flash_ctrl.flash': ['eflash.flash_ctrl'] 'pwrmgr.pwr_rst' : ['rstmgr.pwr'], 'pwrmgr.pwr_clk' : ['clkmgr.pwr'], - } // top is to connect to top net/struct. @@ -377,6 +386,12 @@ 'clkmgr.clk_io': 'clk_io', 'clkmgr.clk_usb': 'clk_usb', 'clkmgr.clk_aon': 'clk_aon' + 'rstmgr.ast': '', + 'pwrmgr.pwr_ast': '', + 'sensor_ctrl.ast_alert': '', + 'sensor_ctrl.ast_status': '', + 'usbdev.usb_ref_val': '', + 'usbdev.usb_ref_pulse': '', }, }, @@ -420,7 +435,7 @@ // ===== ALERT HANDLER ====================================================== // list all modules that expose alerts // first item goes to LSB of the alert source - alert_module: [ "aes", "hmac", "otbn" ] + alert_module: [ "aes", "hmac", "otbn", "sensor_ctrl" ] // generated list of alerts: alert: [
diff --git a/hw/top_earlgrey/data/xbar_peri.hjson b/hw/top_earlgrey/data/xbar_peri.hjson index 6dd38e2..26e342e 100644 --- a/hw/top_earlgrey/data/xbar_peri.hjson +++ b/hw/top_earlgrey/data/xbar_peri.hjson
@@ -69,9 +69,15 @@ reset: "rst_peri_ni", pipeline: "false", }, + { name: "sensor_ctrl", + type: "device", + clock: "clk_peri_i", + reset: "rst_peri_ni", + pipeline: "false", + }, ], connections: { main: ["uart", "gpio", "spi_device", "rv_timer", "usbdev", "pwrmgr", "rstmgr", "clkmgr", - "ram_ret"], + "ram_ret", "sensor_ctrl"], }, }
diff --git a/hw/top_earlgrey/rtl/top_earlgrey_asic.sv b/hw/top_earlgrey/rtl/top_earlgrey_asic.sv index 18889f7..dc596ff 100644 --- a/hw/top_earlgrey/rtl/top_earlgrey_asic.sv +++ b/hw/top_earlgrey/rtl/top_earlgrey_asic.sv
@@ -192,15 +192,67 @@ ); ////////////////////// + // AST // + ////////////////////// + tlul_pkg::tl_h2d_t base_ast_bus; + tlul_pkg::tl_d2h_t ast_base_bus; + ast_wrapper_pkg::ast_status_t ast_base_status; + ast_wrapper_pkg::ast_alert_req_t ast_base_alerts; + ast_wrapper_pkg::ast_alert_rsp_t base_ast_alerts; + ast_wrapper_pkg::ast_rst_t ast_base_rst; + ast_wrapper_pkg::ast_clks_t ast_base_clks; + ast_wrapper_pkg::ast_eflash_t ast_base_eflash; + pwrmgr_pkg::pwr_ast_req_t base_ast_pwr; + pwrmgr_pkg::pwr_ast_rsp_t ast_base_pwr; + //ast_wrapper_pkg::ast_func_clks_rsts base_ast_aux; + logic usb_ref_pulse; + logic usb_ref_val; + + ast_wrapper ast_wrapper ( + .clk_ext_i(clk), + .por_ni(rst_n), + .bus_i(base_ast_bus), + .bus_o(ast_base_bus), + .pwr_i(base_ast_pwr), + .pwr_o(ast_base_pwr), + .rst_o(ast_base_rst), + .clks_o(ast_base_clks), + .usb_ref_pulse_i(usb_ref_pulse), + .usb_ref_val_i(usb_ref_val), + .aux_i('0), // need a hardwired solution until rstmgr/clkmgr update + .adc_i('0), + .adc_o(), + .es_i('0), // not in top_earlgrey + .es_o(), // not in top_earlgrey + .alert_i(base_ast_alerts), + .alert_o(ast_base_alerts), + .status_o(ast_base_status), + .usb_io_pu_cal_o(), + .ast_eflash_o(), // need to wait for flash integration update + .scanmode_i(1'b0), + .scan_reset_ni(1'b1) + ); + + + ////////////////////// // Top-level design // ////////////////////// top_earlgrey top_earlgrey ( .rst_ni ( rst_n ), + // ast connections .clk_main_i ( clk ), .clk_io_i ( clk ), .clk_usb_i ( clk_usb_48mhz ), .clk_aon_i ( clk ), + .rstmgr_ast_i ( ast_base_rst ), + .pwrmgr_pwr_ast_req_o ( base_ast_pwr ), + .pwrmgr_pwr_ast_rsp_i ( ast_base_pwr ), + .sensor_ctrl_ast_alert_req_i ( ast_base_alerts ), + .sensor_ctrl_ast_alert_rsp_o ( base_ast_alerts ), + .sensor_ctrl_ast_status_i ( ast_base_status ), + .usbdev_usb_ref_val_o ( usb_ref_pulse ), + .usbdev_usb_ref_pulse_o ( usb_ref_val ), // JTAG .jtag_tck_i ( jtag_tck ),
diff --git a/hw/top_earlgrey/rtl/top_pkg.sv b/hw/top_earlgrey/rtl/top_pkg.sv index a27b280..b220dba 100644 --- a/hw/top_earlgrey/rtl/top_pkg.sv +++ b/hw/top_earlgrey/rtl/top_pkg.sv
@@ -18,5 +18,10 @@ localparam int FLASH_BYTES_PER_WORD=TL_DBW; localparam int FLASH_INFO_PER_BANK=4; localparam int FLASH_DATA_WIDTH=64; +localparam int NUM_AST_ALERTS=7; +localparam int NUM_IO_RAILS=2; +localparam int ENTROPY_STREAM=4; +localparam int ADC_CHANNELS=2; +localparam int ADC_DATAW=10; endpackage
diff --git a/hw/top_earlgrey/top_earlgrey.core b/hw/top_earlgrey/top_earlgrey.core index 931dc72..5255e48 100644 --- a/hw/top_earlgrey/top_earlgrey.core +++ b/hw/top_earlgrey/top_earlgrey.core
@@ -37,6 +37,8 @@ - lowrisc:top_earlgrey:xbar_peri - lowrisc:ip:rstmgr - lowrisc:ip:pwrmgr + - lowrisc:systems:sensor_ctrl + - lowrisc:systems:ast_wrapper_pkg - lowrisc:tlul:headers - lowrisc:prim:all files:
diff --git a/hw/top_earlgrey/top_earlgrey_asic.core b/hw/top_earlgrey/top_earlgrey_asic.core index d6764a9..d9eb657 100644 --- a/hw/top_earlgrey/top_earlgrey_asic.core +++ b/hw/top_earlgrey/top_earlgrey_asic.core
@@ -8,6 +8,7 @@ files_rtl: depend: - lowrisc:systems:top_earlgrey:0.1 + - lowrisc:systems:ast_wrapper - lowrisc:ibex:ibex_tracer:0.1 files: - rtl/top_earlgrey_asic.sv