| commit | ddbe4fb4f1c85afd69ce77d4303a31b7fbddda6b | [log] [tgz] |
|---|---|---|
| author | Silvestrs Timofejevs <silvestrst@lowrisc.org> | Thu Dec 02 17:22:08 2021 +0000 |
| committer | Silvestrs Timofejevs <silvestrst@lowrisc.org> | Mon Dec 06 09:13:53 2021 +0000 |
| tree | 9d90a171e3cdd60fce23f100542948f5dbdc66e0 | |
| parent | bc01721045d5a61309b30ea61926d967c8848891 [diff] |
[sw, tests] MAIN SRAM test refactor - Make test failure controlled (if execution from SRAM is disabled, we catch it in the exception handler and report a test failure). - Substitute hand-crafted instruction buffer for SRAM execution testing for a naked function. - Simplify the SRAM execution test (simply contains `jalr` that return to the caller). Signed-off-by: Silvestrs Timofejevs <silvestrst@lowrisc.org>
OpenTitan is an open source silicon Root of Trust (RoT) project. OpenTitan will make the silicon RoT design and implementation more transparent, trustworthy, and secure for enterprises, platform providers, and chip manufacturers. OpenTitan is administered by lowRISC CIC as a collaborative project to produce high quality, open IP for instantiation as a full-featured product. See the OpenTitan site and OpenTitan docs for more information about the project.
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