commit dceaafd656b465018c8bfe8e86942d4be3310582
author Weicai Yang <weicai@google.com> Thu Sep 16 16:35:46 2021 -0700
committer weicaiyang <49293026+weicaiyang@users.noreply.github.com> Fri Sep 17 17:36:56 2021 -0700
tree 83566db444c27093479a567a46a730121f575157
parent 138023f84a870e6406537d99cdecf663045170ed

[keymgr/dv] Add operations before LC enables keymgr

After review testplan, add 2 small things
1. Add operations before LC enables keymgr
2. Read/clear inerrupt after operation

Signed-off-by: Weicai Yang <weicai@google.com>

hw/ip/keymgr/dv/env/seq_lib/keymgr_base_vseq.sv

diff --git a/hw/ip/keymgr/dv/env/seq_lib/keymgr_base_vseq.sv b/hw/ip/keymgr/dv/env/seq_lib/keymgr_base_vseq.sv
index 04883ae..3de3ecf 100644
--- a/hw/ip/keymgr/dv/env/seq_lib/keymgr_base_vseq.sv
+++ b/hw/ip/keymgr/dv/env/seq_lib/keymgr_base_vseq.sv
@@ -39,6 +39,9 @@
 
   virtual task dut_init(string reset_kind = "HARD");
     super.dut_init();
+
+    op_before_enable_keymgr();
+
     cfg.keymgr_vif.init();
 
     delay_after_reset_before_access_csr();
@@ -46,6 +49,10 @@
     if (do_keymgr_init) keymgr_init();
   endtask
 
+  // callback task before LC enables keymgr
+  virtual task op_before_enable_keymgr();
+  endtask
+
   virtual task delay_after_reset_before_access_csr();
     // Add 2 cycles for design to synchronize life cycle value from async domain to update cfg_en
     // otherwise, some register programming will be gated
@@ -184,6 +191,12 @@
     if (rd_val != 0) begin
       csr_wr(.ptr(ral.err_code), .value(rd_val));
     end
+
+    // read and clear interrupt
+    csr_rd(.ptr(ral.intr_state), .value(rd_val));
+    if (rd_val != 0) begin
+      csr_wr(.ptr(ral.intr_state), .value(rd_val));
+    end
   endtask : wait_op_done
 
   virtual task read_current_state();

hw/ip/keymgr/dv/env/seq_lib/keymgr_lc_disable_vseq.sv

diff --git a/hw/ip/keymgr/dv/env/seq_lib/keymgr_lc_disable_vseq.sv b/hw/ip/keymgr/dv/env/seq_lib/keymgr_lc_disable_vseq.sv
index 0d29865..9d2c20a 100644
--- a/hw/ip/keymgr/dv/env/seq_lib/keymgr_lc_disable_vseq.sv
+++ b/hw/ip/keymgr/dv/env/seq_lib/keymgr_lc_disable_vseq.sv
@@ -7,6 +7,12 @@
   `uvm_object_utils(keymgr_lc_disable_vseq)
   `uvm_object_new
 
+  virtual task op_before_enable_keymgr();
+    `uvm_info(`gfn, "Dummy operations before LC enables keymgr", UVM_MEDIUM)
+    keymgr_operations();
+    `uvm_info(`gfn, "Dummy operations are done", UVM_MEDIUM)
+  endtask
+
   virtual task body();
     bit regular_vseq_done;