| commit | dc054518a493985f2e0884ba9bacd6de2acea491 | [log] [tgz] |
|---|---|---|
| author | Rupert Swarbrick <rswarbrick@lowrisc.org> | Fri Apr 09 12:42:01 2021 +0100 |
| committer | Rupert Swarbrick <rswarbrick@gmail.com> | Mon Apr 12 07:55:46 2021 +0100 |
| tree | c2ebbc6647c07974fbc6ef1945839af0e627bd7a | |
| parent | cd5d00eed664286a517aadc22bb960d2044724b3 [diff] |
[flash_ctrl] Simplify defn of buf_invalid_alloc in flash_phy_rd The existing expression caused a Verilator UNOPTFLAT warning, because bit k of the signal depended on bits 0..k-1. Rather than telling Verilator to schedule things more cleverly, rewrite the definition to something equivalent which doesn't cause a problem. buf_invalid_alloc[i] is supposed to be true if it's the first bit that is set in buf_invalid[i]. The existing code checked that no previous bit was the first set bit. The new code checks that no previous bit is set at all. This is equivalent. I'd expect any half-decent synthesis tool to generate the same code from both versions but, if it doesn't, the new formulation should be more efficient. Signed-off-by: Rupert Swarbrick <rswarbrick@lowrisc.org>
OpenTitan is an open source silicon Root of Trust (RoT) project. OpenTitan will make the silicon RoT design and implementation more transparent, trustworthy, and secure for enterprises, platform providers, and chip manufacturers. OpenTitan is administered by lowRISC CIC as a collaborative project to produce high quality, open IP for instantiation as a full-featured product. See the OpenTitan site and OpenTitan docs for more information about the project.
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