| commit | d6257b5235fc90f603437da0a4977e8092440de0 | [log] [tgz] |
|---|---|---|
| author | Cindy Chen <chencindy@google.com> | Thu Apr 08 11:18:24 2021 -0700 |
| committer | cindychip <cindy.chen0316@gmail.com> | Thu Apr 08 18:35:14 2021 -0700 |
| tree | 497a2935eafde84bd9b5b45bf95dd92c762dedf5 | |
| parent | 7e26d6f4afaf1488e4987d3ee6cb991d4dc4fdab [diff] |
[dv/otp] force some signals to improve FSM error coverage This PR tries to improve OTP_CTRL's FSM coverage below: 1. sw partition check_fail: Since sw partition does not really do otp_checks, the check_fail comes from internal ECC reg calculation error. In this sequence, I force the error to bit 1 in order to trigger check fail. 2. LC check fail: This is done when we program lc partition via LC interface but did not perform a reset. This is not recommanded in OTP spec so I did not support that in scb, but just use this sequence to check. Signed-off-by: Cindy Chen <chencindy@google.com>
OpenTitan is an open source silicon Root of Trust (RoT) project. OpenTitan will make the silicon RoT design and implementation more transparent, trustworthy, and secure for enterprises, platform providers, and chip manufacturers. OpenTitan is administered by lowRISC CIC as a collaborative project to produce high quality, open IP for instantiation as a full-featured product. See the OpenTitan site and OpenTitan docs for more information about the project.
This repository contains hardware, software and utilities written as part of the OpenTitan project. It is structured as monolithic repository, or “monorepo”, where all components live in one repository. It exists to enable collaboration across partners participating in the OpenTitan project.
The project contains comprehensive documentation of all IPs and tools. You can access it online at docs.opentitan.org.
Have a look at CONTRIBUTING for guidelines on how to contribute code to this repository.
Unless otherwise noted, everything in this repository is covered by the Apache License, Version 2.0 (see LICENSE for full text).