[edn / csrng / entropy_src] swap to dv streamlined sparse_fsm
- no functional changes
- part of #9447 for these blocks
Signed-off-by: Timothy Chen <timothytim@google.com>
diff --git a/hw/ip/csrng/csrng.core b/hw/ip/csrng/csrng.core
index c9deadb..58e1b5c 100644
--- a/hw/ip/csrng/csrng.core
+++ b/hw/ip/csrng/csrng.core
@@ -12,6 +12,7 @@
- lowrisc:prim:count
- lowrisc:prim:assert
- lowrisc:prim:lc_sync
+ - lowrisc:prim:sparse_fsm
- lowrisc:ip:tlul
- lowrisc:ip:aes
- lowrisc:ip:otp_ctrl_pkg
@@ -73,5 +74,3 @@
mode: lint-only
verilator_options:
- "-Wall"
-
-
diff --git a/hw/ip/csrng/rtl/csrng.sv b/hw/ip/csrng/rtl/csrng.sv
index 5b3e366..e970c56 100644
--- a/hw/ip/csrng/rtl/csrng.sv
+++ b/hw/ip/csrng/rtl/csrng.sv
@@ -163,7 +163,26 @@
`ASSERT_PRIM_COUNT_ERROR_TRIGGER_ALERT(CntAlertCheck_A,
u_csrng_core.gen_cmd_stage[i].u_csrng_cmd_stage.u_prim_count_cmd_gen_cntr,
alert_tx_o[1])
+
+ `ASSERT_PRIM_FSM_ERROR_TRIGGER_ALERT(DrbgCmdFsmCheck_A,
+ u_csrng_core.gen_cmd_stage[i].u_csrng_cmd_stage.u_state_regs,
+ alert_tx_o[1])
end
+ `ASSERT_PRIM_FSM_ERROR_TRIGGER_ALERT(CtrlMainFsmCheck_A,
+ u_csrng_core.u_csrng_main_sm.u_state_regs,
+ alert_tx_o[1])
+
+ `ASSERT_PRIM_FSM_ERROR_TRIGGER_ALERT(DrbgGenFsmCheck_A,
+ u_csrng_core.u_csrng_ctr_drbg_gen.u_state_regs,
+ alert_tx_o[1])
+
+ `ASSERT_PRIM_FSM_ERROR_TRIGGER_ALERT(DrbgUpdBlkEncFsmCheck_A,
+ u_csrng_core.u_csrng_ctr_drbg_upd.u_blk_enc_state_regs,
+ alert_tx_o[1])
+
+ `ASSERT_PRIM_FSM_ERROR_TRIGGER_ALERT(DrbgUpdOutBlkFsmCheck_A,
+ u_csrng_core.u_csrng_ctr_drbg_upd.u_outblk_state_regs,
+ alert_tx_o[1])
endmodule
diff --git a/hw/ip/csrng/rtl/csrng_cmd_stage.sv b/hw/ip/csrng/rtl/csrng_cmd_stage.sv
index 3944c1f..520749b 100644
--- a/hw/ip/csrng/rtl/csrng_cmd_stage.sv
+++ b/hw/ip/csrng/rtl/csrng_cmd_stage.sv
@@ -237,14 +237,15 @@
// This primitive is used to place a size-only constraint on the
// flops in order to prevent FSM state encoding optimizations.
- prim_flop #(
+ prim_sparse_fsm_flop #(
+ .StateEnumT(state_e),
.Width(StateWidth),
.ResetValue(StateWidth'(Idle))
) u_state_regs (
.clk_i,
.rst_ni,
- .d_i ( state_d ),
- .q_o ( state_raw_q )
+ .state_i ( state_d ),
+ .state_o ( state_raw_q )
);
assign state_q = state_e'(state_raw_q);
diff --git a/hw/ip/csrng/rtl/csrng_ctr_drbg_gen.sv b/hw/ip/csrng/rtl/csrng_ctr_drbg_gen.sv
index d9b9d03..eeee4b7 100644
--- a/hw/ip/csrng/rtl/csrng_ctr_drbg_gen.sv
+++ b/hw/ip/csrng/rtl/csrng_ctr_drbg_gen.sv
@@ -218,14 +218,15 @@
// This primitive is used to place a size-only constraint on the
// flops in order to prevent FSM state encoding optimizations.
- prim_flop #(
+ prim_sparse_fsm_flop #(
+ .StateEnumT(state_e),
.Width(StateWidth),
.ResetValue(StateWidth'(ReqIdle))
) u_state_regs (
.clk_i,
.rst_ni,
- .d_i ( state_d ),
- .q_o ( state_raw_q )
+ .state_i ( state_d ),
+ .state_o ( state_raw_q )
);
assign state_q = state_e'(state_raw_q);
diff --git a/hw/ip/csrng/rtl/csrng_ctr_drbg_upd.sv b/hw/ip/csrng/rtl/csrng_ctr_drbg_upd.sv
index b29033b..9fa0de5 100644
--- a/hw/ip/csrng/rtl/csrng_ctr_drbg_upd.sv
+++ b/hw/ip/csrng/rtl/csrng_ctr_drbg_upd.sv
@@ -186,14 +186,15 @@
// This primitive is used to place a size-only constraint on the
// flops in order to prevent FSM state encoding optimizations.
- prim_flop #(
+ prim_sparse_fsm_flop #(
+ .StateEnumT(blk_enc_state_e),
.Width(BlkEncStateWidth),
.ResetValue(BlkEncStateWidth'(ReqIdle))
) u_blk_enc_state_regs (
.clk_i,
.rst_ni,
- .d_i ( blk_enc_state_d ),
- .q_o ( blk_enc_state_raw_q )
+ .state_i ( blk_enc_state_d ),
+ .state_o ( blk_enc_state_raw_q )
);
assign blk_enc_state_q = blk_enc_state_e'(blk_enc_state_raw_q);
@@ -232,14 +233,15 @@
// This primitive is used to place a size-only constraint on the
// flops in order to prevent FSM state encoding optimizations.
- prim_flop #(
+ prim_sparse_fsm_flop #(
+ .StateEnumT(outblk_state_e),
.Width(OutBlkStateWidth),
.ResetValue(OutBlkStateWidth'(AckIdle))
) u_outblk_state_regs (
.clk_i,
.rst_ni,
- .d_i ( outblk_state_d ),
- .q_o ( outblk_state_raw_q )
+ .state_i ( outblk_state_d ),
+ .state_o ( outblk_state_raw_q )
);
assign outblk_state_q = outblk_state_e'(outblk_state_raw_q);
diff --git a/hw/ip/csrng/rtl/csrng_main_sm.sv b/hw/ip/csrng/rtl/csrng_main_sm.sv
index d66d56a..eba02c9 100644
--- a/hw/ip/csrng/rtl/csrng_main_sm.sv
+++ b/hw/ip/csrng/rtl/csrng_main_sm.sv
@@ -76,14 +76,15 @@
// This primitive is used to place a size-only constraint on the
// flops in order to prevent FSM state encoding optimizations.
- prim_flop #(
+ prim_sparse_fsm_flop #(
+ .StateEnumT(state_e),
.Width(StateWidth),
.ResetValue(StateWidth'(Idle))
) u_state_regs (
.clk_i,
.rst_ni,
- .d_i ( state_d ),
- .q_o ( state_raw_q )
+ .state_i ( state_d ),
+ .state_o ( state_raw_q )
);
assign state_q = state_e'(state_raw_q);
diff --git a/hw/ip/edn/edn.core b/hw/ip/edn/edn.core
index 7c13f13..f275b44 100644
--- a/hw/ip/edn/edn.core
+++ b/hw/ip/edn/edn.core
@@ -11,6 +11,7 @@
- lowrisc:prim:all
- lowrisc:prim:count
- lowrisc:prim:assert
+ - lowrisc:prim:sparse_fsm
- lowrisc:ip:tlul
- lowrisc:ip:edn_pkg
files:
diff --git a/hw/ip/edn/rtl/edn.sv b/hw/ip/edn/rtl/edn.sv
index 785e014..11515e8 100644
--- a/hw/ip/edn/rtl/edn.sv
+++ b/hw/ip/edn/rtl/edn.sv
@@ -133,5 +133,14 @@
u_edn_core.u_prim_count_max_reqs_cntr,
alert_tx_o[1])
+ `ASSERT_PRIM_FSM_ERROR_TRIGGER_ALERT(MainFsmCheck_A,
+ u_edn_core.u_edn_main_sm.u_state_regs,
+ alert_tx_o[1])
+
+ for (genvar i = 0; i < NumEndPoints; i = i+1) begin : gen_edn_fsm_asserts
+ `ASSERT_PRIM_FSM_ERROR_TRIGGER_ALERT(AckFsmCheck_A,
+ u_edn_core.gen_ep_blk[i].u_edn_ack_sm_ep.u_state_regs,
+ alert_tx_o[1])
+ end
endmodule
diff --git a/hw/ip/edn/rtl/edn_ack_sm.sv b/hw/ip/edn/rtl/edn_ack_sm.sv
index a302d18..ec2ba42 100644
--- a/hw/ip/edn/rtl/edn_ack_sm.sv
+++ b/hw/ip/edn/rtl/edn_ack_sm.sv
@@ -51,14 +51,15 @@
// This primitive is used to place a size-only constraint on the
// flops in order to prevent FSM state encoding optimizations.
- prim_flop #(
+ prim_sparse_fsm_flop #(
+ .StateEnumT(state_e),
.Width(StateWidth),
.ResetValue(StateWidth'(Idle))
) u_state_regs (
.clk_i,
.rst_ni,
- .d_i ( state_d ),
- .q_o ( state_raw_q )
+ .state_i ( state_d ),
+ .state_o ( state_raw_q )
);
assign state_q = state_e'(state_raw_q);
diff --git a/hw/ip/edn/rtl/edn_main_sm.sv b/hw/ip/edn/rtl/edn_main_sm.sv
index cd4920e..e863e86 100644
--- a/hw/ip/edn/rtl/edn_main_sm.sv
+++ b/hw/ip/edn/rtl/edn_main_sm.sv
@@ -62,14 +62,15 @@
// This primitive is used to place a size-only constraint on the
// flops in order to prevent FSM state encoding optimizations.
- prim_flop #(
+ prim_sparse_fsm_flop #(
+ .StateEnumT(state_e),
.Width(StateWidth),
.ResetValue(StateWidth'(Idle))
) u_state_regs (
.clk_i,
.rst_ni,
- .d_i ( state_d ),
- .q_o ( state_raw_q )
+ .state_i ( state_d ),
+ .state_o ( state_raw_q )
);
assign state_q = state_e'(state_raw_q);
diff --git a/hw/ip/entropy_src/entropy_src.core b/hw/ip/entropy_src/entropy_src.core
index 3b980fd..b396bbe 100644
--- a/hw/ip/entropy_src/entropy_src.core
+++ b/hw/ip/entropy_src/entropy_src.core
@@ -12,6 +12,7 @@
- lowrisc:prim:count
- lowrisc:prim:assert
- lowrisc:prim:lfsr
+ - lowrisc:prim:sparse_fsm
- lowrisc:ip:tlul
- lowrisc:ip:sha3
- lowrisc:ip:otp_ctrl_pkg
diff --git a/hw/ip/entropy_src/rtl/entropy_src.sv b/hw/ip/entropy_src/rtl/entropy_src.sv
index a67792e..4f41add 100644
--- a/hw/ip/entropy_src/rtl/entropy_src.sv
+++ b/hw/ip/entropy_src/rtl/entropy_src.sv
@@ -321,4 +321,12 @@
u_entropy_src_core.u_entropy_src_repcnts_ht.u_prim_count_test_cnt,
alert_tx_o[1])
+ `ASSERT_PRIM_FSM_ERROR_TRIGGER_ALERT(CtrlMainFsmCheck_A,
+ u_entropy_src_core.u_entropy_src_main_sm.u_state_regs,
+ alert_tx_o[1])
+
+ `ASSERT_PRIM_FSM_ERROR_TRIGGER_ALERT(CtrlAckFsmCheck_A,
+ u_entropy_src_core.u_entropy_src_ack_sm.u_state_regs,
+ alert_tx_o[1])
+
endmodule
diff --git a/hw/ip/entropy_src/rtl/entropy_src_ack_sm.sv b/hw/ip/entropy_src/rtl/entropy_src_ack_sm.sv
index 71aef36..07e99d3 100644
--- a/hw/ip/entropy_src/rtl/entropy_src_ack_sm.sv
+++ b/hw/ip/entropy_src/rtl/entropy_src_ack_sm.sv
@@ -52,14 +52,15 @@
// This primitive is used to place a size-only constraint on the
// flops in order to prevent FSM state encoding optimizations.
- prim_flop #(
+ prim_sparse_fsm_flop #(
+ .StateEnumT(state_e),
.Width(StateWidth),
.ResetValue(StateWidth'(Idle))
) u_state_regs (
.clk_i,
.rst_ni,
- .d_i ( state_d ),
- .q_o ( state_raw_q )
+ .state_i ( state_d ),
+ .state_o ( state_raw_q )
);
assign state_q = state_e'(state_raw_q);
diff --git a/hw/ip/entropy_src/rtl/entropy_src_main_sm.sv b/hw/ip/entropy_src/rtl/entropy_src_main_sm.sv
index 20b2baa..90c8169 100644
--- a/hw/ip/entropy_src/rtl/entropy_src_main_sm.sv
+++ b/hw/ip/entropy_src/rtl/entropy_src_main_sm.sv
@@ -82,14 +82,15 @@
// This primitive is used to place a size-only constraint on the
// flops in order to prevent FSM state encoding optimizations.
- prim_flop #(
+ prim_sparse_fsm_flop #(
+ .StateEnumT(state_e),
.Width(StateWidth),
.ResetValue(StateWidth'(Idle))
) u_state_regs (
.clk_i,
.rst_ni,
- .d_i ( state_d ),
- .q_o ( state_raw_q )
+ .state_i ( state_d ),
+ .state_o ( state_raw_q )
);
assign state_q = state_e'(state_raw_q);
