| commit | d54a4501bac32181e927a1e7d9d20051e26cbd23 | [log] [tgz] |
|---|---|---|
| author | Rupert Swarbrick <rswarbrick@lowrisc.org> | Fri Jul 10 12:06:53 2020 +0100 |
| committer | Rupert Swarbrick <rswarbrick@gmail.com> | Fri Jul 10 14:55:10 2020 +0100 |
| tree | 8bb0113d88c604057bdba7b0266d9dc379a8de75 | |
| parent | 25f451aef294216ebf4c6ac2d10cb6997623844c [diff] |
[otbn] Correct wmask assertions in OTBN top-level This fixes the assertion about imem_wmask_bus so that it only triggers on a write (a partial wmask on a read is allowed, but ignored). This patch also removes the imem_write_o port from otbn_core: the core cannot write to IMEM. We keep the imem_write_core signal in otbn.sv, because it makes things look a bit more uniform, but it's forced to zero. The patch completely removes imem_wmask_core from otbn.sv: it was just assigned to and then ignored in otbn.sv, so we may as well get rid of it. Signed-off-by: Rupert Swarbrick <rswarbrick@lowrisc.org>
OpenTitan is an open source silicon Root of Trust (RoT) project. OpenTitan will make the silicon RoT design and implementation more transparent, trustworthy, and secure for enterprises, platform providers, and chip manufacturers. OpenTitan is administered by lowRISC CIC as a collaborative project to produce high quality, open IP for instantiation as a full-featured product. See the OpenTitan site and OpenTitan docs for more information about the project.
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