commit | d5407d5fc39ad93f80b095911089f840501efdb7 | [log] [tgz] |
---|---|---|
author | Cindy Chen <chencindy@google.com> | Mon Aug 10 16:27:47 2020 -0700 |
committer | cindychip <cindy.chen0316@gmail.com> | Fri Aug 21 16:38:12 2020 -0700 |
tree | 1f9797bc2b256c94324482c858dc2730f9611a9c | |
parent | d7d6e0f1eb6c2a06d3ee536bc9c3a99667bdd483 [diff] |
[dv/shadow_reg] update sequence for storage error 1. Add two backdoor paths for shadow_reg's `shadow_q` and `committed_q` 2. In `shadow_reg_errors` vseq, randomly choose to backdoor write either one of the registers, and create a storage error. 3. Add a special tag called `shadowed_reg_path` in regtool because the shadow reg is declared separated in aes core. 4. override `poke` task to update `committed_val` and `shadow_val` 5. disable shadow_reg related assertions in AES and top_level to avoid assertion errors 6. change ral backdoor default path from `RTL` to `BkdrRegRtl` Signed-off-by: Cindy Chen <chencindy@google.com>
OpenTitan is an open source silicon Root of Trust (RoT) project. OpenTitan will make the silicon RoT design and implementation more transparent, trustworthy, and secure for enterprises, platform providers, and chip manufacturers. OpenTitan is administered by lowRISC CIC as a collaborative project to produce high quality, open IP for instantiation as a full-featured product. See the OpenTitan site and OpenTitan docs for more information about the project.
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