[dv] Align csr::reset_asserted to actual reset pin
previous implemenation may assert reset for CSR pkg before reset
actually occurs. Move those calls to dv_base_scoreboard, where we
monitors the reset
Signed-off-by: Weicai Yang <weicai@google.com>
diff --git a/hw/dv/sv/dv_lib/dv_base_scoreboard.sv b/hw/dv/sv/dv_lib/dv_base_scoreboard.sv
index f2e57cf..ea5200b 100644
--- a/hw/dv/sv/dv_lib/dv_base_scoreboard.sv
+++ b/hw/dv/sv/dv_lib/dv_base_scoreboard.sv
@@ -33,9 +33,12 @@
if (!cfg.clk_rst_vif.rst_n) begin
`uvm_info(`gfn, "reset occurred", UVM_HIGH)
cfg.reset_asserted();
+ csr_utils_pkg::reset_asserted();
@(posedge cfg.clk_rst_vif.rst_n);
reset();
cfg.reset_deasserted();
+ csr_utils_pkg::clear_outstanding_access();
+ csr_utils_pkg::reset_deasserted();
`uvm_info(`gfn, "out of reset", UVM_HIGH)
end
else begin
diff --git a/hw/dv/sv/dv_lib/dv_base_vseq.sv b/hw/dv/sv/dv_lib/dv_base_vseq.sv
index 6e0d447..ff7d306 100644
--- a/hw/dv/sv/dv_lib/dv_base_vseq.sv
+++ b/hw/dv/sv/dv_lib/dv_base_vseq.sv
@@ -25,7 +25,7 @@
// knobs to enable pre_start routines
bit do_dut_init = 1'b1;
bit do_apply_reset = 1'b1;
- bit do_wait_for_reset = 1'b1;
+ bit do_wait_for_reset = 1'b0;
// knobs to enable post_start routines
bit do_dut_shutdown = 1'b1;
@@ -86,10 +86,7 @@
virtual task apply_reset(string kind = "HARD");
if (kind == "HARD") begin
- csr_utils_pkg::reset_asserted();
cfg.clk_rst_vif.apply_reset();
- csr_utils_pkg::clear_outstanding_access();
- csr_utils_pkg::reset_deasserted();
end
if (cfg.has_ral) begin
foreach (cfg.ral_models[i]) cfg.ral_models[i].reset(kind);
