commit | d14b37a8c2a7f7faa351587c7a3489fa58db0790 | [log] [tgz] |
---|---|---|
author | Tom Roberts <tomroberts@lowrisc.org> | Mon Apr 20 16:51:18 2020 +0100 |
committer | Philipp Wagner <mail@philipp-wagner.com> | Tue Apr 21 14:11:29 2020 +0100 |
tree | e0e206cdc50ee07f81f3591ec52592315cb3ba43 | |
parent | 41a3e434f7403ac002c6990ce9ee3cc4bc07cd07 [diff] |
Update lowrisc_ibex to lowRISC/ibex@a3a1f9f Update code from upstream repository https://github.com/lowRISC/ibex.git to revision a3a1f9f40a73b3494de378f38d587c31d4ef9da9 * [rtl] Fix icache PMP error handling (Tom Roberts) * [memutils] Add support for > 32b memories (Tom Roberts) * [dv] fix PMP compile option, update basic pmp test (Udi) * Fix rst syntax (Michael Gielda) * Update google_riscv-dv to google/riscv-dv@42264b7 (Udi) * update yaml file for riviera (Dawid Zimonczyk) * Bugfix: Generate Erroneous Illegal Insn (ganoam) * Add clocking blocks to the ibex_icache_core_agent (Rupert Swarbrick) * Fix variable names in icache scoreboard code (Rupert Swarbrick) * Fix scratch-root in icache/dv/Makefile (Rupert Swarbrick) * [bitmanip] Add ZBT Instruction Group (ganoam) * Teach check_tool_requirements to check for edalize versions (Rupert Swarbrick) * Rename ibex_icache_agent -> ibex_icache_core_agent (Rupert Swarbrick) * Minimal code for the 'core agent' in icache UVM testbench (Rupert Swarbrick) * Add a simple Makefile to wrap running dvsim for icache tests (Rupert Swarbrick) * Switch from 'bool' to 'int' parameters in fusesoc core files (Rupert Swarbrick) * [ci] Fix multi-config CI (Greg Chadwick) * [lint] Add waiver for RV32B parameter (Greg Chadwick) * Add RV32B parameter to ibex_core_tracing/ibex_riscv_compliance (Greg Chadwick) * Clarifications in icache detailed documentation (Rupert Swarbrick) * [rtl] Add fixed time execution of branches (Tom Roberts) * [dv] fix timing issue in ebreakmu_test (Udi) * Initial icache testplan (Rupert Swarbrick) * Fill out an initial DV plan for the icache (Rupert Swarbrick) * [dv] Remove IUS support (Greg Chadwick) * [dv] Fix running on LSF (Udi) Signed-off-by: Tom Roberts <tomroberts@lowrisc.org>
OpenTitan is an open source silicon Root of Trust (RoT) project. OpenTitan will make the silicon RoT design and implementation more transparent, trustworthy, and secure for enterprises, platform providers, and chip manufacturers. OpenTitan is administered by lowRISC CIC as a collaborative project to produce high quality, open IP for instantiation as a full-featured product. See the OpenTitan site and OpenTitan docs for more information about the project.
This repository contains hardware, software and utilities written as part of the OpenTitan project. It is structured as monolithic repository, or “monorepo”, where all components live in one repository. It exists to enable collaboration across partners participating in the OpenTitan project.
The project contains comprehensive documentation of all IPs and tools. You can either access it online or build it locally by following the steps below.
$ sudo apt install curl python3 python3-pip $ pip3 install --user -r python-requirements.txt
$ ./util/build_docs.py --preview
This compiles the documentation into ./build/docs
and starts a local server, which allows you to access the documentation at http://127.0.0.1:1313.
Have a look at CONTRIBUTING for guidelines on how to contribute code to this repository.
Unless otherwise noted, everything in this repository is covered by the Apache License, Version 2.0 (see LICENSE for full text).