| commit | d072ac505f82152678d6e04be95c72b728a347b8 | [log] [tgz] |
|---|---|---|
| author | Jes B. Klinke <jbk@chromium.org> | Fri Oct 07 14:54:34 2022 -0700 |
| committer | Alphan Ulusoy <alphan@google.com> | Wed Oct 12 18:52:36 2022 -0400 |
| tree | 1bed3fa4c8dd6c6fc7f344634f7c03fbf98e37e3 | |
| parent | 613668a8e7bb2d369334ec6c385feae0ab3bff7f [diff] |
[opentitantool] Support multi-layer alias conf We have an agreed way of connecting HyperDebug to CW310, which should be declared in a JSON conf file, such that opentitan tool understands a name such as A3 to be an alias of the HyperDebug native pin CN7_18. Separately, the ChromeOS team has a particular idea of how to use the OpenTitan chip pins, and wishes to use the name AP_FLASH_SEL as an alias for A3. This is mostly independent of CW310 and HyperDebug, and would apply even to future ASIC development board. Because of the above, I foresee that we would want to simultaneously provide a CW310/HyperDebug configuration file, and a CromeOS/EarlGrey configuration file to OpenTitan tool. This PR allows the --conf option to take multiple arguments, and it adapts the alias resolution logic to be transitive. Change-Id: I6f8a328f269dfee246a19c4d3bae9fd60f056aec Signed-off-by: Jes B. Klinke <jbk@chromium.org>
OpenTitan is an open source silicon Root of Trust (RoT) project. OpenTitan will make the silicon RoT design and implementation more transparent, trustworthy, and secure for enterprises, platform providers, and chip manufacturers. OpenTitan is administered by lowRISC CIC as a collaborative project to produce high quality, open IP for instantiation as a full-featured product. See the OpenTitan site and OpenTitan docs for more information about the project.
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