[dif/rv_plic] fix incorrect DIF naming convention
This fixes #7824 by renaming all rv_plic DIFs with the correct
prefix of "dif_rv_plic_" instead of "dif_plic_", to match the IP
block's name of "rv_plic".
Signed-off-by: Timothy Trippel <ttrippel@google.com>
diff --git a/hw/ip/rv_plic/data/rv_plic.prj.hjson b/hw/ip/rv_plic/data/rv_plic.prj.hjson
index bf07d25..6e32228 100644
--- a/hw/ip/rv_plic/data/rv_plic.prj.hjson
+++ b/hw/ip/rv_plic/data/rv_plic.prj.hjson
@@ -7,7 +7,7 @@
design_spec: "../doc",
dv_doc: "../doc/dv",
hw_checklist: "../doc/checklist",
- sw_checklist: "/sw/device/lib/dif/dif_plic",
+ sw_checklist: "/sw/device/lib/dif/dif_rv_plic",
revisions: [
{
version: "0.5",
diff --git a/hw/ip/rv_plic/doc/_index.md b/hw/ip/rv_plic/doc/_index.md
index cc9f90c..32e2ec2 100644
--- a/hw/ip/rv_plic/doc/_index.md
+++ b/hw/ip/rv_plic/doc/_index.md
@@ -228,7 +228,7 @@
## Device Interface Functions (DIFs)
-{{< dif_listing "sw/device/lib/dif/dif_plic.h" >}}
+{{< dif_listing "sw/device/lib/dif/dif_rv_plic.h" >}}
## Registers
diff --git a/hw/top_earlgrey/data/chip_testplan.hjson b/hw/top_earlgrey/data/chip_testplan.hjson
index 41adda3..576b612 100644
--- a/hw/top_earlgrey/data/chip_testplan.hjson
+++ b/hw/top_earlgrey/data/chip_testplan.hjson
@@ -2334,7 +2334,7 @@
"chip_dif_kmac_cshake_smoketest",
"chip_dif_otbn_smoketest",
"chip_dif_otp_ctrl_smoketest",
- "chip_dif_plic_smoketest",
+ "chip_dif_rv_plic_smoketest",
"chip_dif_pwrmgr_smoketest",
"chip_dif_rv_timer_smoketest",
"chip_dif_rstmgr_smoketest",
diff --git a/hw/top_earlgrey/dv/chip_dif_tests.hjson b/hw/top_earlgrey/dv/chip_dif_tests.hjson
index 2b2a4b6..8019a37 100644
--- a/hw/top_earlgrey/dv/chip_dif_tests.hjson
+++ b/hw/top_earlgrey/dv/chip_dif_tests.hjson
@@ -81,9 +81,9 @@
en_run_modes: ["sw_test_mode"]
}
{
- name: chip_dif_plic_smoketest
+ name: chip_dif_rv_plic_smoketest
uvm_test_seq: chip_sw_base_vseq
- sw_images: ["sw/device/tests/dif_plic_smoketest:1"]
+ sw_images: ["sw/device/tests/dif_rv_plic_smoketest:1"]
en_run_modes: ["sw_test_mode"]
}
{
@@ -126,7 +126,7 @@
"chip_dif_kmac_smoketest",
"chip_dif_otbn_smoketest",
"chip_dif_otp_ctrl_smoketest",
- "chip_dif_plic_smoketest",
+ "chip_dif_rv_plic_smoketest",
"chip_dif_pwrmgr_smoketest",
"chip_dif_rv_timer_smoketest",
"chip_dif_rstmgr_smoketest",
diff --git a/hw/top_earlgrey/dv/chip_sim_cfg.hjson b/hw/top_earlgrey/dv/chip_sim_cfg.hjson
index 5f90061..65197ba 100644
--- a/hw/top_earlgrey/dv/chip_sim_cfg.hjson
+++ b/hw/top_earlgrey/dv/chip_sim_cfg.hjson
@@ -149,9 +149,9 @@
// dictionary declared in `sw/device/tests/meson.build`, the `sw_images` list
// below should contain `sw/device/tests/<sw_test_name>` (without any more
// subdirectories) because that is where the meson target is created. For
- // example `dif_plic_smoketest` is added to `sw_tests` in
+ // example `dif_rv_plic_smoketest` is added to `sw_tests` in
// `sw/device/tests/dif/meson.build`, but the final meson targets all start
- // `sw/device/tests/dif_plic_smoketest_`.
+ // `sw/device/tests/dif_rv_plic_smoketest_`.
//
// Each entry in `sw_images` is followed by an index separated with ':' which
// is used by the testbench to know what type of image is it:
diff --git a/hw/top_earlgrey/dv/verilator/verilator_sim_cfg.hjson b/hw/top_earlgrey/dv/verilator/verilator_sim_cfg.hjson
index a598503..c59f66a 100644
--- a/hw/top_earlgrey/dv/verilator/verilator_sim_cfg.hjson
+++ b/hw/top_earlgrey/dv/verilator/verilator_sim_cfg.hjson
@@ -85,9 +85,9 @@
// dictionary declared in `sw/device/tests/meson.build`, the `sw_images` list
// below should contain `sw/device/tests/<sw_test_name>` (without any more
// subdirectories) because that is where the meson target is created. For
- // example `dif_plic_smoketest` is added to `sw_tests` in
+ // example `dif_rv_plic_smoketest` is added to `sw_tests` in
// `sw/device/tests/dif/meson.build`, but the final meson targets all start
- // `sw/device/tests/dif_plic_smoketest_`.
+ // `sw/device/tests/dif_rv_plic_smoketest_`.
//
// Each entry in `sw_images` is followed by an index separated with ':' which
// is used by the testbench to know what type of image is it:
@@ -158,8 +158,8 @@
sw_images: ["sw/device/tests/dif_otp_ctrl_smoketest:1"]
}
{
- name: dif_plic_smoketest
- sw_images: ["sw/device/tests/dif_plic_smoketest:1"]
+ name: dif_rv_plic_smoketest
+ sw_images: ["sw/device/tests/dif_rv_plic_smoketest:1"]
}
// TODO(#6656): AST is not instantiated in chip_earlgrey_verilator.
// {
diff --git a/sw/device/lib/dif/dif_plic.c b/sw/device/lib/dif/dif_rv_plic.c
similarity index 65%
rename from sw/device/lib/dif/dif_plic.c
rename to sw/device/lib/dif/dif_rv_plic.c
index ae1e9c4..05372da 100644
--- a/sw/device/lib/dif/dif_plic.c
+++ b/sw/device/lib/dif/dif_rv_plic.c
@@ -2,7 +2,7 @@
// Licensed under the Apache License, Version 2.0, see LICENSE for details.
// SPDX-License-Identifier: Apache-2.0
-#include "sw/device/lib/dif/dif_plic.h"
+#include "sw/device/lib/dif/dif_rv_plic.h"
#include <stdbool.h>
#include <stddef.h>
@@ -13,8 +13,8 @@
#include "rv_plic_regs.h" // Generated.
-const uint32_t kDifPlicMinPriority = 0;
-const uint32_t kDifPlicMaxPriority = RV_PLIC_PRIO0_PRIO0_MASK;
+const uint32_t kDifRvPlicMinPriority = 0;
+const uint32_t kDifRvPlicMaxPriority = RV_PLIC_PRIO0_PRIO0_MASK;
/**
* PLIC register info.
@@ -34,7 +34,7 @@
* accommodate all the bits (1 bit per IRQ source). This function calculates
* the offset for a specific IRQ source ID (ID 32 would be IE01, ...).
*/
-static ptrdiff_t plic_offset_from_reg0(dif_plic_irq_id_t irq) {
+static ptrdiff_t plic_offset_from_reg0(dif_rv_plic_irq_id_t irq) {
uint8_t register_index = irq / RV_PLIC_PARAM_REG_WIDTH;
return register_index * sizeof(uint32_t);
}
@@ -47,14 +47,14 @@
* the bit position within a register for a specific IRQ source ID (ID 32 would
* be bit 0).
*/
-static uint8_t plic_irq_bit_index(dif_plic_irq_id_t irq) {
+static uint8_t plic_irq_bit_index(dif_rv_plic_irq_id_t irq) {
return irq % RV_PLIC_PARAM_REG_WIDTH;
}
/**
* Get the address of the first target N interrupt enable register (IEN0).
*/
-static ptrdiff_t plic_irq_enable_base_for_target(dif_plic_target_t target) {
+static ptrdiff_t plic_irq_enable_base_for_target(dif_rv_plic_target_t target) {
ptrdiff_t range = RV_PLIC_IE0_MULTIREG_COUNT * sizeof(uint32_t);
return RV_PLIC_IE0_0_REG_OFFSET + (range * target);
}
@@ -62,29 +62,31 @@
/**
* Get the address of the first target N software interrupt register (MSIPN).
*/
-static ptrdiff_t plic_software_irq_base_for_target(dif_plic_target_t target) {
+static ptrdiff_t plic_software_irq_base_for_target(
+ dif_rv_plic_target_t target) {
return RV_PLIC_MSIP0_REG_OFFSET + (target * sizeof(uint32_t));
}
/**
* Get the address of the first target N threshold register (THRESHOLDN).
*/
-static ptrdiff_t plic_threshold_base_for_target(dif_plic_target_t target) {
+static ptrdiff_t plic_threshold_base_for_target(dif_rv_plic_target_t target) {
return RV_PLIC_THRESHOLD0_REG_OFFSET + (target * sizeof(uint32_t));
}
/**
* Get the address of the first target N claim complete register (CCN).
*/
-static ptrdiff_t plic_claim_complete_base_for_target(dif_plic_target_t target) {
+static ptrdiff_t plic_claim_complete_base_for_target(
+ dif_rv_plic_target_t target) {
return RV_PLIC_CC0_REG_OFFSET + (target * sizeof(uint32_t));
}
/**
* Get a target and an IRQ source specific Interrupt Enable register info.
*/
-static plic_reg_info_t plic_irq_enable_reg_info(dif_plic_irq_id_t irq,
- dif_plic_target_t target) {
+static plic_reg_info_t plic_irq_enable_reg_info(dif_rv_plic_irq_id_t irq,
+ dif_rv_plic_target_t target) {
ptrdiff_t offset = plic_offset_from_reg0(irq);
return (plic_reg_info_t){
.offset = plic_irq_enable_base_for_target(target) + offset,
@@ -95,7 +97,8 @@
/**
* Get an IRQ source specific Level/Edge register info.
*/
-static plic_reg_info_t plic_irq_trigger_type_reg_info(dif_plic_irq_id_t irq) {
+static plic_reg_info_t plic_irq_trigger_type_reg_info(
+ dif_rv_plic_irq_id_t irq) {
ptrdiff_t offset = plic_offset_from_reg0(irq);
return (plic_reg_info_t){
.offset = RV_PLIC_LE_0_REG_OFFSET + offset,
@@ -106,7 +109,7 @@
/**
* Get an IRQ source specific Interrupt Pending register info.
*/
-static plic_reg_info_t plic_irq_pending_reg_info(dif_plic_irq_id_t irq) {
+static plic_reg_info_t plic_irq_pending_reg_info(dif_rv_plic_irq_id_t irq) {
ptrdiff_t offset = plic_offset_from_reg0(irq);
return (plic_reg_info_t){
.offset = RV_PLIC_IP_0_REG_OFFSET + offset,
@@ -120,7 +123,7 @@
* There is one PRIO register per IRQ source, this function calculates the IRQ
* source specific PRIO register offset.
*/
-static ptrdiff_t plic_priority_reg_offset(dif_plic_irq_id_t irq) {
+static ptrdiff_t plic_priority_reg_offset(dif_rv_plic_irq_id_t irq) {
ptrdiff_t offset = irq * sizeof(uint32_t);
return RV_PLIC_PRIO0_REG_OFFSET + offset;
}
@@ -133,7 +136,7 @@
* claimed the CC register, so we assume that the previous "owner" of the
* resource has cleared/completed the CC access.
*/
-static void plic_reset(const dif_plic_t *plic) {
+static void plic_reset(const dif_rv_plic_t *plic) {
// Clear all of the Level/Edge registers.
for (int i = 0; i < RV_PLIC_LE_MULTIREG_COUNT; ++i) {
ptrdiff_t offset = RV_PLIC_LE_0_REG_OFFSET + (i * sizeof(uint32_t));
@@ -147,7 +150,7 @@
}
// Clear all of the target related registers.
- for (dif_plic_target_t target = 0; target < RV_PLIC_PARAM_NUM_TARGET;
+ for (dif_rv_plic_target_t target = 0; target < RV_PLIC_PARAM_NUM_TARGET;
++target) {
// Clear interrupt enable registers.
ptrdiff_t offset = plic_irq_enable_base_for_target(target);
@@ -166,9 +169,10 @@
}
}
-dif_plic_result_t dif_plic_init(dif_plic_params_t params, dif_plic_t *plic) {
+dif_rv_plic_result_t dif_rv_plic_init(dif_rv_plic_params_t params,
+ dif_rv_plic_t *plic) {
if (plic == NULL) {
- return kDifPlicBadArg;
+ return kDifRvPlicBadArg;
}
plic->params = params;
@@ -176,46 +180,46 @@
// TODO: Move this out into its own function.
plic_reset(plic);
- return kDifPlicOk;
+ return kDifRvPlicOk;
}
-dif_plic_result_t dif_plic_irq_get_enabled(const dif_plic_t *plic,
- dif_plic_irq_id_t irq,
- dif_plic_target_t target,
- dif_plic_toggle_t *state) {
+dif_rv_plic_result_t dif_rv_plic_irq_get_enabled(const dif_rv_plic_t *plic,
+ dif_rv_plic_irq_id_t irq,
+ dif_rv_plic_target_t target,
+ dif_rv_plic_toggle_t *state) {
if (plic == NULL || irq >= RV_PLIC_PARAM_NUM_SRC ||
target >= RV_PLIC_PARAM_NUM_TARGET) {
- return kDifPlicBadArg;
+ return kDifRvPlicBadArg;
}
plic_reg_info_t reg_info = plic_irq_enable_reg_info(irq, target);
uint32_t reg = mmio_region_read32(plic->params.base_addr, reg_info.offset);
bool is_enabled = bitfield_bit32_read(reg, reg_info.bit_index);
- *state = is_enabled ? kDifPlicToggleEnabled : kDifPlicToggleDisabled;
+ *state = is_enabled ? kDifRvPlicToggleEnabled : kDifRvPlicToggleDisabled;
- return kDifPlicOk;
+ return kDifRvPlicOk;
}
-dif_plic_result_t dif_plic_irq_set_enabled(const dif_plic_t *plic,
- dif_plic_irq_id_t irq,
- dif_plic_target_t target,
- dif_plic_toggle_t state) {
+dif_rv_plic_result_t dif_rv_plic_irq_set_enabled(const dif_rv_plic_t *plic,
+ dif_rv_plic_irq_id_t irq,
+ dif_rv_plic_target_t target,
+ dif_rv_plic_toggle_t state) {
if (plic == NULL || irq >= RV_PLIC_PARAM_NUM_SRC ||
target >= RV_PLIC_PARAM_NUM_TARGET) {
- return kDifPlicBadArg;
+ return kDifRvPlicBadArg;
}
bool flag;
switch (state) {
- case kDifPlicToggleEnabled:
+ case kDifRvPlicToggleEnabled:
flag = true;
break;
- case kDifPlicToggleDisabled:
+ case kDifRvPlicToggleDisabled:
flag = false;
break;
default:
- return kDifPlicBadArg;
+ return kDifRvPlicBadArg;
}
plic_reg_info_t reg_info = plic_irq_enable_reg_info(irq, target);
@@ -224,26 +228,26 @@
reg = bitfield_bit32_write(reg, reg_info.bit_index, flag);
mmio_region_write32(plic->params.base_addr, reg_info.offset, reg);
- return kDifPlicOk;
+ return kDifRvPlicOk;
}
-dif_plic_result_t dif_plic_irq_set_trigger(const dif_plic_t *plic,
- dif_plic_irq_id_t irq,
- dif_plic_irq_trigger_t trigger) {
+dif_rv_plic_result_t dif_rv_plic_irq_set_trigger(
+ const dif_rv_plic_t *plic, dif_rv_plic_irq_id_t irq,
+ dif_rv_plic_irq_trigger_t trigger) {
if (plic == NULL || irq >= RV_PLIC_PARAM_NUM_SRC) {
- return kDifPlicBadArg;
+ return kDifRvPlicBadArg;
}
bool flag;
switch (trigger) {
- case kDifPlicIrqTriggerEdge:
+ case kDifRvPlicIrqTriggerEdge:
flag = true;
break;
- case kDifPlicIrqTriggerLevel:
+ case kDifRvPlicIrqTriggerLevel:
flag = false;
break;
default:
- return kDifPlicBadArg;
+ return kDifRvPlicBadArg;
}
plic_reg_info_t reg_info = plic_irq_trigger_type_reg_info(irq);
@@ -252,70 +256,70 @@
reg = bitfield_bit32_write(reg, reg_info.bit_index, flag);
mmio_region_write32(plic->params.base_addr, reg_info.offset, reg);
- return kDifPlicOk;
+ return kDifRvPlicOk;
}
-dif_plic_result_t dif_plic_irq_set_priority(const dif_plic_t *plic,
- dif_plic_irq_id_t irq,
- uint32_t priority) {
+dif_rv_plic_result_t dif_rv_plic_irq_set_priority(const dif_rv_plic_t *plic,
+ dif_rv_plic_irq_id_t irq,
+ uint32_t priority) {
if (plic == NULL || irq >= RV_PLIC_PARAM_NUM_SRC ||
- priority > kDifPlicMaxPriority) {
- return kDifPlicBadArg;
+ priority > kDifRvPlicMaxPriority) {
+ return kDifRvPlicBadArg;
}
ptrdiff_t offset = plic_priority_reg_offset(irq);
mmio_region_write32(plic->params.base_addr, offset, priority);
- return kDifPlicOk;
+ return kDifRvPlicOk;
}
-dif_plic_result_t dif_plic_target_set_threshold(const dif_plic_t *plic,
- dif_plic_target_t target,
- uint32_t threshold) {
+dif_rv_plic_result_t dif_rv_plic_target_set_threshold(
+ const dif_rv_plic_t *plic, dif_rv_plic_target_t target,
+ uint32_t threshold) {
if (plic == NULL || target >= RV_PLIC_PARAM_NUM_TARGET ||
- threshold > kDifPlicMaxPriority) {
- return kDifPlicBadArg;
+ threshold > kDifRvPlicMaxPriority) {
+ return kDifRvPlicBadArg;
}
ptrdiff_t threshold_offset = plic_threshold_base_for_target(target);
mmio_region_write32(plic->params.base_addr, threshold_offset, threshold);
- return kDifPlicOk;
+ return kDifRvPlicOk;
}
-dif_plic_result_t dif_plic_irq_is_pending(const dif_plic_t *plic,
- dif_plic_irq_id_t irq,
- bool *is_pending) {
+dif_rv_plic_result_t dif_rv_plic_irq_is_pending(const dif_rv_plic_t *plic,
+ dif_rv_plic_irq_id_t irq,
+ bool *is_pending) {
if (plic == NULL || irq >= RV_PLIC_PARAM_NUM_SRC || is_pending == NULL) {
- return kDifPlicBadArg;
+ return kDifRvPlicBadArg;
}
plic_reg_info_t reg_info = plic_irq_pending_reg_info(irq);
uint32_t reg = mmio_region_read32(plic->params.base_addr, reg_info.offset);
*is_pending = bitfield_bit32_read(reg, reg_info.bit_index);
- return kDifPlicOk;
+ return kDifRvPlicOk;
}
-dif_plic_result_t dif_plic_irq_claim(const dif_plic_t *plic,
- dif_plic_target_t target,
- dif_plic_irq_id_t *claim_data) {
+dif_rv_plic_result_t dif_rv_plic_irq_claim(const dif_rv_plic_t *plic,
+ dif_rv_plic_target_t target,
+ dif_rv_plic_irq_id_t *claim_data) {
if (plic == NULL || target >= RV_PLIC_PARAM_NUM_TARGET ||
claim_data == NULL) {
- return kDifPlicBadArg;
+ return kDifRvPlicBadArg;
}
ptrdiff_t claim_complete_reg = plic_claim_complete_base_for_target(target);
*claim_data = mmio_region_read32(plic->params.base_addr, claim_complete_reg);
- return kDifPlicOk;
+ return kDifRvPlicOk;
}
-dif_plic_result_t dif_plic_irq_complete(const dif_plic_t *plic,
- dif_plic_target_t target,
- dif_plic_irq_id_t complete_data) {
+dif_rv_plic_result_t dif_rv_plic_irq_complete(
+ const dif_rv_plic_t *plic, dif_rv_plic_target_t target,
+ dif_rv_plic_irq_id_t complete_data) {
if (plic == NULL || target >= RV_PLIC_PARAM_NUM_TARGET) {
- return kDifPlicBadArg;
+ return kDifRvPlicBadArg;
}
// Write back the claimed IRQ ID to the target specific CC register,
@@ -324,39 +328,38 @@
mmio_region_write32(plic->params.base_addr, claim_complete_reg,
complete_data);
- return kDifPlicOk;
+ return kDifRvPlicOk;
}
-dif_plic_result_t dif_plic_software_irq_force(const dif_plic_t *plic,
- dif_plic_target_t target) {
+dif_rv_plic_result_t dif_rv_plic_software_irq_force(
+ const dif_rv_plic_t *plic, dif_rv_plic_target_t target) {
if (plic == NULL || target >= RV_PLIC_PARAM_NUM_TARGET) {
- return kDifPlicBadArg;
+ return kDifRvPlicBadArg;
}
ptrdiff_t msip_offset = plic_software_irq_base_for_target(target);
mmio_region_write32(plic->params.base_addr, msip_offset, 1);
- return kDifPlicOk;
+ return kDifRvPlicOk;
}
-dif_plic_result_t dif_plic_software_irq_acknowledge(const dif_plic_t *plic,
- dif_plic_target_t target) {
+dif_rv_plic_result_t dif_rv_plic_software_irq_acknowledge(
+ const dif_rv_plic_t *plic, dif_rv_plic_target_t target) {
if (plic == NULL || target >= RV_PLIC_PARAM_NUM_TARGET) {
- return kDifPlicBadArg;
+ return kDifRvPlicBadArg;
}
ptrdiff_t msip_offset = plic_software_irq_base_for_target(target);
mmio_region_write32(plic->params.base_addr, msip_offset, 0);
- return kDifPlicOk;
+ return kDifRvPlicOk;
}
-dif_plic_result_t dif_plic_software_irq_is_pending(const dif_plic_t *plic,
- dif_plic_target_t target,
- bool *is_pending) {
+dif_rv_plic_result_t dif_rv_plic_software_irq_is_pending(
+ const dif_rv_plic_t *plic, dif_rv_plic_target_t target, bool *is_pending) {
if (plic == NULL || target >= RV_PLIC_PARAM_NUM_TARGET ||
is_pending == NULL) {
- return kDifPlicBadArg;
+ return kDifRvPlicBadArg;
}
ptrdiff_t msip_offset = plic_software_irq_base_for_target(target);
@@ -365,5 +368,5 @@
*is_pending = (register_value == 1) ? true : false;
- return kDifPlicOk;
+ return kDifRvPlicOk;
}
diff --git a/sw/device/lib/dif/dif_plic.h b/sw/device/lib/dif/dif_rv_plic.h
similarity index 67%
rename from sw/device/lib/dif/dif_plic.h
rename to sw/device/lib/dif/dif_rv_plic.h
index 62a3655..246db3b 100644
--- a/sw/device/lib/dif/dif_plic.h
+++ b/sw/device/lib/dif/dif_rv_plic.h
@@ -2,8 +2,8 @@
// Licensed under the Apache License, Version 2.0, see LICENSE for details.
// SPDX-License-Identifier: Apache-2.0
-#ifndef OPENTITAN_SW_DEVICE_LIB_DIF_DIF_PLIC_H_
-#define OPENTITAN_SW_DEVICE_LIB_DIF_DIF_PLIC_H_
+#ifndef OPENTITAN_SW_DEVICE_LIB_DIF_DIF_RV_PLIC_H_
+#define OPENTITAN_SW_DEVICE_LIB_DIF_DIF_RV_PLIC_H_
/**
* @file
@@ -33,16 +33,16 @@
* This enum may be used instead of a `bool` when describing an enabled/disabled
* state.
*/
-typedef enum dif_plic_toggle {
+typedef enum dif_rv_plic_toggle {
/*
* The "enabled" state.
*/
- kDifPlicToggleEnabled,
+ kDifRvPlicToggleEnabled,
/**
* The "disabled" state.
*/
- kDifPlicToggleDisabled,
-} dif_plic_toggle_t;
+ kDifRvPlicToggleDisabled,
+} dif_rv_plic_toggle_t;
/**
* Hardware instantiation parameters for PLIC.
@@ -51,52 +51,52 @@
* not determined until the hardware design is used as part of a top-level
* design.
*/
-typedef struct dif_plic_params {
+typedef struct dif_rv_plic_params {
/**
* The base address for the PLIC hardware registers.
*/
mmio_region_t base_addr;
-} dif_plic_params_t;
+} dif_rv_plic_params_t;
/**
* A handle to PLIC.
*
* This type should be treated as opaque by users.
*/
-typedef struct dif_plic {
- dif_plic_params_t params;
-} dif_plic_t;
+typedef struct dif_rv_plic {
+ dif_rv_plic_params_t params;
+} dif_rv_plic_t;
/**
* The result of a PLIC operation.
*/
-typedef enum dif_plic_result {
+typedef enum dif_rv_plic_result {
/**
* Indicates that the operation succeeded.
*/
- kDifPlicOk = 0,
+ kDifRvPlicOk = 0,
/**
* Indicates some unspecified failure.
*/
- kDifPlicError = 1,
+ kDifRvPlicError = 1,
/**
* Indicates that some parameter passed into a function failed a
* precondition.
*
* When this value is returned, no hardware operations occurred.
*/
- kDifPlicBadArg = 2,
-} dif_plic_result_t;
+ kDifRvPlicBadArg = 2,
+} dif_rv_plic_result_t;
/**
* The lowest interrupt priority.
*/
-extern const uint32_t kDifPlicMinPriority;
+extern const uint32_t kDifRvPlicMinPriority;
/**
* The highest interrupt priority.
*/
-extern const uint32_t kDifPlicMaxPriority;
+extern const uint32_t kDifRvPlicMaxPriority;
/**
* A PLIC interrupt source identifier.
@@ -109,7 +109,7 @@
*
* The value 0 corresponds to "No Interrupt".
*/
-typedef uint32_t dif_plic_irq_id_t;
+typedef uint32_t dif_rv_plic_irq_id_t;
/**
* A PLIC interrupt target.
@@ -121,21 +121,21 @@
* This is an unsigned 32-bit value that is at least 0 and is less than the
* `NumTarget` instantiation parameter of the `rv_plic` device.
*/
-typedef uint32_t dif_plic_target_t;
+typedef uint32_t dif_rv_plic_target_t;
/**
* An interrupt trigger type.
*/
-typedef enum dif_plic_irq_trigger {
+typedef enum dif_rv_plic_irq_trigger {
/**
* Trigger on an edge (when the signal changes from low to high).
*/
- kDifPlicIrqTriggerEdge,
+ kDifRvPlicIrqTriggerEdge,
/**
* Trigger on a level (when the signal remains high).
*/
- kDifPlicIrqTriggerLevel,
-} dif_plic_irq_trigger_t;
+ kDifRvPlicIrqTriggerLevel,
+} dif_rv_plic_irq_trigger_t;
/**
* Creates a new handle for PLIC.
@@ -147,7 +147,8 @@
* @return The result of the operation.
*/
DIF_WARN_UNUSED_RESULT
-dif_plic_result_t dif_plic_init(dif_plic_params_t params, dif_plic_t *plic);
+dif_rv_plic_result_t dif_rv_plic_init(dif_rv_plic_params_t params,
+ dif_rv_plic_t *plic);
/**
* Returns whether a particular interrupt is currently pending.
@@ -158,9 +159,9 @@
* @return The result of the operation.
*/
DIF_WARN_UNUSED_RESULT
-dif_plic_result_t dif_plic_irq_is_pending(const dif_plic_t *plic,
- dif_plic_irq_id_t irq,
- bool *is_pending);
+dif_rv_plic_result_t dif_rv_plic_irq_is_pending(const dif_rv_plic_t *plic,
+ dif_rv_plic_irq_id_t irq,
+ bool *is_pending);
/**
* Checks whether a particular interrupt is currently enabled or disabled.
@@ -172,10 +173,10 @@
* @return The result of the operation.
*/
DIF_WARN_UNUSED_RESULT
-dif_plic_result_t dif_plic_irq_get_enabled(const dif_plic_t *plic,
- dif_plic_irq_id_t irq,
- dif_plic_target_t target,
- dif_plic_toggle_t *state);
+dif_rv_plic_result_t dif_rv_plic_irq_get_enabled(const dif_rv_plic_t *plic,
+ dif_rv_plic_irq_id_t irq,
+ dif_rv_plic_target_t target,
+ dif_rv_plic_toggle_t *state);
/**
* Sets whether a particular interrupt is currently enabled or disabled.
@@ -190,10 +191,10 @@
* @return The result of the operation.
*/
DIF_WARN_UNUSED_RESULT
-dif_plic_result_t dif_plic_irq_set_enabled(const dif_plic_t *plic,
- dif_plic_irq_id_t irq,
- dif_plic_target_t target,
- dif_plic_toggle_t state);
+dif_rv_plic_result_t dif_rv_plic_irq_set_enabled(const dif_rv_plic_t *plic,
+ dif_rv_plic_irq_id_t irq,
+ dif_rv_plic_target_t target,
+ dif_rv_plic_toggle_t state);
/**
* Sets the IRQ trigger type.
@@ -207,9 +208,9 @@
* @return The result of the operation.
*/
DIF_WARN_UNUSED_RESULT
-dif_plic_result_t dif_plic_irq_set_trigger(const dif_plic_t *plic,
- dif_plic_irq_id_t irq,
- dif_plic_irq_trigger_t trigger);
+dif_rv_plic_result_t dif_rv_plic_irq_set_trigger(
+ const dif_rv_plic_t *plic, dif_rv_plic_irq_id_t irq,
+ dif_rv_plic_irq_trigger_t trigger);
/**
* Sets IRQ source priority (0-3).
@@ -224,9 +225,9 @@
* @return The result of the operation.
*/
DIF_WARN_UNUSED_RESULT
-dif_plic_result_t dif_plic_irq_set_priority(const dif_plic_t *plic,
- dif_plic_irq_id_t irq,
- uint32_t priority);
+dif_rv_plic_result_t dif_rv_plic_irq_set_priority(const dif_rv_plic_t *plic,
+ dif_rv_plic_irq_id_t irq,
+ uint32_t priority);
/**
* Sets the target priority threshold.
@@ -241,17 +242,17 @@
* @return The result of the operation.
*/
DIF_WARN_UNUSED_RESULT
-dif_plic_result_t dif_plic_target_set_threshold(const dif_plic_t *plic,
- dif_plic_target_t target,
- uint32_t threshold);
+dif_rv_plic_result_t dif_rv_plic_target_set_threshold(
+ const dif_rv_plic_t *plic, dif_rv_plic_target_t target, uint32_t threshold);
/**
* Claims an IRQ and gets the information about the source.
*
* Claims an IRQ and returns the IRQ related data to the caller. This function
- * reads a target specific Claim/Complete register. #dif_plic_irq_complete must
- * be called in order to allow another interrupt with the same source id to be
- * delivered. This usually would be done once the interrupt has been serviced.
+ * reads a target specific Claim/Complete register. #dif_rv_plic_irq_complete
+ * must be called in order to allow another interrupt with the same source id to
+ * be delivered. This usually would be done once the interrupt has been
+ * serviced.
*
* Another IRQ can be claimed before a prior IRQ is completed. In this way, this
* functionality is compatible with nested interrupt handling. The restriction
@@ -261,7 +262,7 @@
* interrupts should be Completed in the reverse order of when they were
* Claimed.
*
- * @see #dif_plic_irq_complete
+ * @see #dif_rv_plic_irq_complete
*
* @param plic A PLIC handle.
* @param target Target that claimed the IRQ.
@@ -269,21 +270,21 @@
* @return The result of the operation.
*/
DIF_WARN_UNUSED_RESULT
-dif_plic_result_t dif_plic_irq_claim(const dif_plic_t *plic,
- dif_plic_target_t target,
- dif_plic_irq_id_t *claim_data);
+dif_rv_plic_result_t dif_rv_plic_irq_claim(const dif_rv_plic_t *plic,
+ dif_rv_plic_target_t target,
+ dif_rv_plic_irq_id_t *claim_data);
/**
* Completes the claimed IRQ.
*
* Finishes servicing of the claimed IRQ by writing the IRQ source ID back to a
* target specific Claim/Complete register. This function must be called after
- * #dif_plic_irq_claim, when the caller is prepared to service another IRQ with
- * the same source ID. If a source ID is never Completed, then when future
+ * #dif_rv_plic_irq_claim, when the caller is prepared to service another IRQ
+ * with the same source ID. If a source ID is never Completed, then when future
* interrupts are Claimed, they will never have the source ID of the uncompleted
* IRQ.
*
- * @see #dif_plic_irq_claim
+ * @see #dif_rv_plic_irq_claim
*
* @param plic A PLIC handle.
* @param target Target that claimed the IRQ.
@@ -292,9 +293,9 @@
* @return The result of the operation.
*/
DIF_WARN_UNUSED_RESULT
-dif_plic_result_t dif_plic_irq_complete(const dif_plic_t *plic,
- dif_plic_target_t target,
- dif_plic_irq_id_t complete_data);
+dif_rv_plic_result_t dif_rv_plic_irq_complete(
+ const dif_rv_plic_t *plic, dif_rv_plic_target_t target,
+ dif_rv_plic_irq_id_t complete_data);
/**
* Forces the software interrupt for a particular target.
@@ -306,16 +307,16 @@
* would not be possible due to HART being only able to access own CSRs.
* NOTE: this is not an issue on Ibex, as it has only one HART.
*
- * An interrupt handler is expected to call `dif_plic_software_irq_acknowledge`
- * when the interrupt has been handled.
+ * An interrupt handler is expected to call
+ * `dif_rv_plic_software_irq_acknowledge` when the interrupt has been handled.
*
* @param plic PLIC state data.
* @param target Target HART.
- * @return `dif_plic_result_t`.
+ * @return `dif_rv_plic_result_t`.
*/
DIF_WARN_UNUSED_RESULT
-dif_plic_result_t dif_plic_software_irq_force(const dif_plic_t *plic,
- dif_plic_target_t target);
+dif_rv_plic_result_t dif_rv_plic_software_irq_force(
+ const dif_rv_plic_t *plic, dif_rv_plic_target_t target);
/**
* Acknowledges the software interrupt for a particular target.
@@ -326,11 +327,11 @@
*
* @param plic PLIC state data.
* @param target Target HART.
- * @return `dif_plic_result_t`.
+ * @return `dif_rv_plic_result_t`.
*/
DIF_WARN_UNUSED_RESULT
-dif_plic_result_t dif_plic_software_irq_acknowledge(const dif_plic_t *plic,
- dif_plic_target_t target);
+dif_rv_plic_result_t dif_rv_plic_software_irq_acknowledge(
+ const dif_rv_plic_t *plic, dif_rv_plic_target_t target);
/**
* Returns software interrupt pending state for a particular target.
@@ -338,15 +339,14 @@
* @param plic PLIC state data.
* @param target Target HART.
* @param[out] is_pending Flag indicating whether the interrupt is pending.
- * @return `dif_plic_result_t`.
+ * @return `dif_rv_plic_result_t`.
*/
DIF_WARN_UNUSED_RESULT
-dif_plic_result_t dif_plic_software_irq_is_pending(const dif_plic_t *plic,
- dif_plic_target_t target,
- bool *is_pending);
+dif_rv_plic_result_t dif_rv_plic_software_irq_is_pending(
+ const dif_rv_plic_t *plic, dif_rv_plic_target_t target, bool *is_pending);
#ifdef __cplusplus
} // extern "C"
#endif // __cplusplus
-#endif // OPENTITAN_SW_DEVICE_LIB_DIF_DIF_PLIC_H_
+#endif // OPENTITAN_SW_DEVICE_LIB_DIF_DIF_RV_PLIC_H_
diff --git a/sw/device/lib/dif/dif_plic.md b/sw/device/lib/dif/dif_rv_plic.md
similarity index 100%
rename from sw/device/lib/dif/dif_plic.md
rename to sw/device/lib/dif/dif_rv_plic.md
diff --git a/sw/device/lib/dif/dif_plic_unittest.cc b/sw/device/lib/dif/dif_rv_plic_unittest.cc
similarity index 68%
rename from sw/device/lib/dif/dif_plic_unittest.cc
rename to sw/device/lib/dif/dif_rv_plic_unittest.cc
index 0ed67e5..8701106 100644
--- a/sw/device/lib/dif/dif_plic_unittest.cc
+++ b/sw/device/lib/dif/dif_rv_plic_unittest.cc
@@ -2,7 +2,7 @@
// Licensed under the Apache License, Version 2.0, see LICENSE for details.
// SPDX-License-Identifier: Apache-2.0
-#include "sw/device/lib/dif/dif_plic.h"
+#include "sw/device/lib/dif/dif_rv_plic.h"
#include <array>
@@ -12,7 +12,7 @@
#include "rv_plic_regs.h" // Generated.
-namespace dif_plic_unittest {
+namespace dif_rv_plic_unittest {
namespace {
using mock_mmio::MmioTest;
using mock_mmio::MockDevice;
@@ -30,7 +30,7 @@
class PlicTest : public Test, public MmioTest {
protected:
- dif_plic_t plic_ = {
+ dif_rv_plic_t plic_ = {
.params = {.base_addr = dev().region()},
};
};
@@ -69,14 +69,15 @@
};
TEST_F(InitTest, NullArgs) {
- EXPECT_EQ(dif_plic_init({.base_addr = dev().region()}, nullptr),
- kDifPlicBadArg);
+ EXPECT_EQ(dif_rv_plic_init({.base_addr = dev().region()}, nullptr),
+ kDifRvPlicBadArg);
}
TEST_F(InitTest, Success) {
ExpectInitReset();
- EXPECT_EQ(dif_plic_init({.base_addr = dev().region()}, &plic_), kDifPlicOk);
+ EXPECT_EQ(dif_rv_plic_init({.base_addr = dev().region()}, &plic_),
+ kDifRvPlicOk);
}
class IrqTest : public PlicTest {
@@ -169,9 +170,9 @@
class IrqEnableSetTest : public IrqTest {};
TEST_F(IrqEnableSetTest, NullArgs) {
- EXPECT_EQ(dif_plic_irq_set_enabled(nullptr, kFirstIrq, kTarget0,
- kDifPlicToggleEnabled),
- kDifPlicBadArg);
+ EXPECT_EQ(dif_rv_plic_irq_set_enabled(nullptr, kFirstIrq, kTarget0,
+ kDifRvPlicToggleEnabled),
+ kDifRvPlicBadArg);
}
TEST_F(IrqEnableSetTest, Target0Enable) {
@@ -179,9 +180,9 @@
// Enable every IRQ, one at a time.
for (int i = 0; i < RV_PLIC_PARAM_NUM_SRC; ++i) {
- EXPECT_EQ(
- dif_plic_irq_set_enabled(&plic_, i, kTarget0, kDifPlicToggleEnabled),
- kDifPlicOk);
+ EXPECT_EQ(dif_rv_plic_irq_set_enabled(&plic_, i, kTarget0,
+ kDifRvPlicToggleEnabled),
+ kDifRvPlicOk);
}
}
@@ -190,9 +191,9 @@
// Disable every bit, one at a time.
for (int i = 0; i < RV_PLIC_PARAM_NUM_SRC; ++i) {
- EXPECT_EQ(
- dif_plic_irq_set_enabled(&plic_, i, kTarget0, kDifPlicToggleDisabled),
- kDifPlicOk);
+ EXPECT_EQ(dif_rv_plic_irq_set_enabled(&plic_, i, kTarget0,
+ kDifRvPlicToggleDisabled),
+ kDifRvPlicOk);
}
}
@@ -200,8 +201,8 @@
TEST_F(IrqTriggerTypeSetTest, NullArgs) {
EXPECT_EQ(
- dif_plic_irq_set_trigger(nullptr, kFirstIrq, kDifPlicIrqTriggerEdge),
- kDifPlicBadArg);
+ dif_rv_plic_irq_set_trigger(nullptr, kFirstIrq, kDifRvPlicIrqTriggerEdge),
+ kDifRvPlicBadArg);
}
TEST_F(IrqTriggerTypeSetTest, Enable) {
@@ -209,8 +210,8 @@
// Enable every IRQ, one at a time.
for (int i = 0; i < RV_PLIC_PARAM_NUM_SRC; ++i) {
- EXPECT_EQ(dif_plic_irq_set_trigger(&plic_, i, kDifPlicIrqTriggerEdge),
- kDifPlicOk);
+ EXPECT_EQ(dif_rv_plic_irq_set_trigger(&plic_, i, kDifRvPlicIrqTriggerEdge),
+ kDifRvPlicOk);
}
}
@@ -219,70 +220,71 @@
// Enable every IRQ, one at a time.
for (int i = 0; i < RV_PLIC_PARAM_NUM_SRC; ++i) {
- EXPECT_EQ(dif_plic_irq_set_trigger(&plic_, i, kDifPlicIrqTriggerLevel),
- kDifPlicOk);
+ EXPECT_EQ(dif_rv_plic_irq_set_trigger(&plic_, i, kDifRvPlicIrqTriggerLevel),
+ kDifRvPlicOk);
}
}
class IrqPrioritySetTest : public PlicTest {};
TEST_F(IrqPrioritySetTest, NullArgs) {
- EXPECT_EQ(dif_plic_irq_set_priority(nullptr, kFirstIrq, kDifPlicMaxPriority),
- kDifPlicBadArg);
+ EXPECT_EQ(
+ dif_rv_plic_irq_set_priority(nullptr, kFirstIrq, kDifRvPlicMaxPriority),
+ kDifRvPlicBadArg);
}
TEST_F(IrqPrioritySetTest, PriorityInvalid) {
- EXPECT_EQ(
- dif_plic_irq_set_priority(nullptr, kFirstIrq, kDifPlicMaxPriority + 1),
- kDifPlicBadArg);
+ EXPECT_EQ(dif_rv_plic_irq_set_priority(nullptr, kFirstIrq,
+ kDifRvPlicMaxPriority + 1),
+ kDifRvPlicBadArg);
}
TEST_F(IrqPrioritySetTest, Success) {
for (int i = 0; i < RV_PLIC_PARAM_NUM_SRC; ++i) {
// Set expectations for every priority set call.
ptrdiff_t offset = RV_PLIC_PRIO0_REG_OFFSET + (sizeof(uint32_t) * i);
- EXPECT_WRITE32(offset, kDifPlicMaxPriority);
+ EXPECT_WRITE32(offset, kDifRvPlicMaxPriority);
- EXPECT_EQ(dif_plic_irq_set_priority(&plic_, i, kDifPlicMaxPriority),
- kDifPlicOk);
+ EXPECT_EQ(dif_rv_plic_irq_set_priority(&plic_, i, kDifRvPlicMaxPriority),
+ kDifRvPlicOk);
}
}
class TargetThresholdSetTest : public PlicTest {};
TEST_F(TargetThresholdSetTest, NullArgs) {
- EXPECT_EQ(
- dif_plic_target_set_threshold(nullptr, kTarget0, kDifPlicMaxPriority),
- kDifPlicBadArg);
+ EXPECT_EQ(dif_rv_plic_target_set_threshold(nullptr, kTarget0,
+ kDifRvPlicMaxPriority),
+ kDifRvPlicBadArg);
}
TEST_F(TargetThresholdSetTest, Target0PriorityInvalid) {
- EXPECT_EQ(
- dif_plic_target_set_threshold(&plic_, kTarget0, kDifPlicMaxPriority + 1),
- kDifPlicBadArg);
+ EXPECT_EQ(dif_rv_plic_target_set_threshold(&plic_, kTarget0,
+ kDifRvPlicMaxPriority + 1),
+ kDifRvPlicBadArg);
}
TEST_F(TargetThresholdSetTest, Target0Success) {
- EXPECT_WRITE32(RV_PLIC_THRESHOLD0_REG_OFFSET, kDifPlicMaxPriority);
+ EXPECT_WRITE32(RV_PLIC_THRESHOLD0_REG_OFFSET, kDifRvPlicMaxPriority);
EXPECT_EQ(
- dif_plic_target_set_threshold(&plic_, kTarget0, kDifPlicMaxPriority),
- kDifPlicOk);
+ dif_rv_plic_target_set_threshold(&plic_, kTarget0, kDifRvPlicMaxPriority),
+ kDifRvPlicOk);
}
class IrqPendingStatusGetTest : public IrqTest {};
TEST_F(IrqPendingStatusGetTest, NullArgs) {
bool status;
- dif_plic_result_t result =
- dif_plic_irq_is_pending(nullptr, kFirstIrq, &status);
- EXPECT_EQ(result, kDifPlicBadArg);
+ dif_rv_plic_result_t result =
+ dif_rv_plic_irq_is_pending(nullptr, kFirstIrq, &status);
+ EXPECT_EQ(result, kDifRvPlicBadArg);
- result = dif_plic_irq_is_pending(&plic_, kFirstIrq, nullptr);
- EXPECT_EQ(result, kDifPlicBadArg);
+ result = dif_rv_plic_irq_is_pending(&plic_, kFirstIrq, nullptr);
+ EXPECT_EQ(result, kDifRvPlicBadArg);
- result = dif_plic_irq_is_pending(nullptr, kFirstIrq, nullptr);
- EXPECT_EQ(result, kDifPlicBadArg);
+ result = dif_rv_plic_irq_is_pending(nullptr, kFirstIrq, nullptr);
+ EXPECT_EQ(result, kDifRvPlicBadArg);
}
TEST_F(IrqPendingStatusGetTest, Enabled) {
@@ -291,8 +293,9 @@
// Get status of every IRQ, one at a time.
for (int i = 0; i < RV_PLIC_PARAM_NUM_SRC; ++i) {
bool status;
- dif_plic_result_t result = dif_plic_irq_is_pending(&plic_, i, &status);
- EXPECT_EQ(result, kDifPlicOk);
+ dif_rv_plic_result_t result =
+ dif_rv_plic_irq_is_pending(&plic_, i, &status);
+ EXPECT_EQ(result, kDifRvPlicOk);
EXPECT_TRUE(status);
}
}
@@ -303,8 +306,9 @@
// Get status of every IRQ, one at a time.
for (int i = 0; i < RV_PLIC_PARAM_NUM_SRC; ++i) {
bool status;
- dif_plic_result_t result = dif_plic_irq_is_pending(&plic_, i, &status);
- EXPECT_EQ(result, kDifPlicOk);
+ dif_rv_plic_result_t result =
+ dif_rv_plic_irq_is_pending(&plic_, i, &status);
+ EXPECT_EQ(result, kDifRvPlicOk);
EXPECT_FALSE(status);
}
}
@@ -314,12 +318,13 @@
};
TEST_F(IrqClaimTest, NullArgs) {
- dif_plic_irq_id_t data;
- EXPECT_EQ(dif_plic_irq_claim(nullptr, kTarget0, &data), kDifPlicBadArg);
+ dif_rv_plic_irq_id_t data;
+ EXPECT_EQ(dif_rv_plic_irq_claim(nullptr, kTarget0, &data), kDifRvPlicBadArg);
- EXPECT_EQ(dif_plic_irq_claim(&plic_, kTarget0, nullptr), kDifPlicBadArg);
+ EXPECT_EQ(dif_rv_plic_irq_claim(&plic_, kTarget0, nullptr), kDifRvPlicBadArg);
- EXPECT_EQ(dif_plic_irq_claim(nullptr, kTarget0, nullptr), kDifPlicBadArg);
+ EXPECT_EQ(dif_rv_plic_irq_claim(nullptr, kTarget0, nullptr),
+ kDifRvPlicBadArg);
}
TEST_F(IrqClaimTest, Target0Success) {
@@ -330,8 +335,8 @@
// Claim every IRQ, one per a call.
for (int i = 0; i < RV_PLIC_PARAM_NUM_SRC; ++i) {
- dif_plic_irq_id_t data;
- EXPECT_EQ(dif_plic_irq_claim(&plic_, kTarget0, &data), kDifPlicOk);
+ dif_rv_plic_irq_id_t data;
+ EXPECT_EQ(dif_rv_plic_irq_claim(&plic_, kTarget0, &data), kDifRvPlicOk);
EXPECT_EQ(data, i);
}
}
@@ -341,7 +346,7 @@
};
TEST_F(IrqCompleteTest, NullArgs) {
- EXPECT_EQ(dif_plic_irq_complete(nullptr, kTarget0, 0), kDifPlicBadArg);
+ EXPECT_EQ(dif_rv_plic_irq_complete(nullptr, kTarget0, 0), kDifRvPlicBadArg);
}
TEST_F(IrqCompleteTest, Target0Success) {
@@ -352,7 +357,7 @@
// Complete all of the IRQs.
for (int i = 0; i < RV_PLIC_PARAM_NUM_SRC; ++i) {
- EXPECT_EQ(dif_plic_irq_complete(&plic_, kTarget0, i), kDifPlicOk);
+ EXPECT_EQ(dif_rv_plic_irq_complete(&plic_, kTarget0, i), kDifRvPlicOk);
}
}
@@ -361,17 +366,18 @@
};
TEST_F(SoftwareIrqForceTest, NullArgs) {
- EXPECT_EQ(dif_plic_software_irq_force(nullptr, kTarget0), kDifPlicBadArg);
+ EXPECT_EQ(dif_rv_plic_software_irq_force(nullptr, kTarget0),
+ kDifRvPlicBadArg);
}
TEST_F(SoftwareIrqForceTest, BadTarget) {
- EXPECT_EQ(dif_plic_software_irq_force(&plic_, RV_PLIC_PARAM_NUM_TARGET),
- kDifPlicBadArg);
+ EXPECT_EQ(dif_rv_plic_software_irq_force(&plic_, RV_PLIC_PARAM_NUM_TARGET),
+ kDifRvPlicBadArg);
}
TEST_F(SoftwareIrqForceTest, Target0Success) {
EXPECT_WRITE32(RV_PLIC_MSIP0_REG_OFFSET, 1);
- EXPECT_EQ(dif_plic_software_irq_force(&plic_, kTarget0), kDifPlicOk);
+ EXPECT_EQ(dif_rv_plic_software_irq_force(&plic_, kTarget0), kDifRvPlicOk);
}
class SoftwareIrqAcknowledgeTest : public PlicTest {
@@ -379,18 +385,20 @@
};
TEST_F(SoftwareIrqAcknowledgeTest, NullArgs) {
- EXPECT_EQ(dif_plic_software_irq_acknowledge(nullptr, kTarget0),
- kDifPlicBadArg);
+ EXPECT_EQ(dif_rv_plic_software_irq_acknowledge(nullptr, kTarget0),
+ kDifRvPlicBadArg);
}
TEST_F(SoftwareIrqAcknowledgeTest, BadTarget) {
- EXPECT_EQ(dif_plic_software_irq_acknowledge(&plic_, RV_PLIC_PARAM_NUM_TARGET),
- kDifPlicBadArg);
+ EXPECT_EQ(
+ dif_rv_plic_software_irq_acknowledge(&plic_, RV_PLIC_PARAM_NUM_TARGET),
+ kDifRvPlicBadArg);
}
TEST_F(SoftwareIrqAcknowledgeTest, Target0Success) {
EXPECT_WRITE32(RV_PLIC_MSIP0_REG_OFFSET, 0);
- EXPECT_EQ(dif_plic_software_irq_acknowledge(&plic_, kTarget0), kDifPlicOk);
+ EXPECT_EQ(dif_rv_plic_software_irq_acknowledge(&plic_, kTarget0),
+ kDifRvPlicOk);
}
class SoftwareIrqIsPendingTest : public PlicTest {
@@ -398,40 +406,40 @@
};
TEST_F(SoftwareIrqIsPendingTest, NullArgs) {
- EXPECT_EQ(dif_plic_software_irq_is_pending(nullptr, kTarget0, nullptr),
- kDifPlicBadArg);
+ EXPECT_EQ(dif_rv_plic_software_irq_is_pending(nullptr, kTarget0, nullptr),
+ kDifRvPlicBadArg);
- EXPECT_EQ(dif_plic_software_irq_is_pending(&plic_, kTarget0, nullptr),
- kDifPlicBadArg);
+ EXPECT_EQ(dif_rv_plic_software_irq_is_pending(&plic_, kTarget0, nullptr),
+ kDifRvPlicBadArg);
bool is_pending;
- EXPECT_EQ(dif_plic_software_irq_is_pending(nullptr, kTarget0, &is_pending),
- kDifPlicBadArg);
+ EXPECT_EQ(dif_rv_plic_software_irq_is_pending(nullptr, kTarget0, &is_pending),
+ kDifRvPlicBadArg);
}
TEST_F(SoftwareIrqIsPendingTest, BadTarget) {
bool is_pending;
- EXPECT_EQ(dif_plic_software_irq_is_pending(&plic_, RV_PLIC_PARAM_NUM_TARGET,
- &is_pending),
- kDifPlicBadArg);
+ EXPECT_EQ(dif_rv_plic_software_irq_is_pending(
+ &plic_, RV_PLIC_PARAM_NUM_TARGET, &is_pending),
+ kDifRvPlicBadArg);
}
TEST_F(SoftwareIrqIsPendingTest, Target0Success) {
bool is_pending = false;
EXPECT_READ32(RV_PLIC_MSIP0_REG_OFFSET, 1);
- EXPECT_EQ(dif_plic_software_irq_is_pending(&plic_, kTarget0, &is_pending),
- kDifPlicOk);
+ EXPECT_EQ(dif_rv_plic_software_irq_is_pending(&plic_, kTarget0, &is_pending),
+ kDifRvPlicOk);
EXPECT_TRUE(is_pending);
// Cleared
is_pending = true;
EXPECT_READ32(RV_PLIC_MSIP0_REG_OFFSET, 0);
- EXPECT_EQ(dif_plic_software_irq_is_pending(&plic_, kTarget0, &is_pending),
- kDifPlicOk);
+ EXPECT_EQ(dif_rv_plic_software_irq_is_pending(&plic_, kTarget0, &is_pending),
+ kDifRvPlicOk);
EXPECT_FALSE(is_pending);
}
} // namespace
-} // namespace dif_plic_unittest
+} // namespace dif_rv_plic_unittest
diff --git a/sw/device/lib/dif/meson.build b/sw/device/lib/dif/meson.build
index b82e4ef..d3c0f37 100644
--- a/sw/device/lib/dif/meson.build
+++ b/sw/device/lib/dif/meson.build
@@ -112,13 +112,13 @@
suite: 'dif',
)
-# PLIC DIF library (dif_plic)
-sw_lib_dif_plic = declare_dependency(
+# PLIC DIF library (dif_rv_plic)
+sw_lib_dif_rv_plic = declare_dependency(
link_with: static_library(
- 'dif_plic_ot',
+ 'dif_rv_plic_ot',
sources: [
hw_top_earlgrey_rv_plic_reg_h,
- 'dif_plic.c',
+ 'dif_rv_plic.c',
],
dependencies: [
sw_lib_mmio,
@@ -127,12 +127,12 @@
)
)
-test('dif_plic_unittest', executable(
- 'dif_plic_unittest',
+test('dif_rv_plic_unittest', executable(
+ 'dif_rv_plic_unittest',
sources: [
hw_top_earlgrey_rv_plic_reg_h,
- meson.source_root() / 'sw/device/lib/dif/dif_plic.c',
- 'dif_plic_unittest.cc',
+ meson.source_root() / 'sw/device/lib/dif/dif_rv_plic.c',
+ 'dif_rv_plic_unittest.cc',
],
dependencies: [
sw_vendor_gtest,
diff --git a/sw/device/tests/dif/dif_plic_smoketest.c b/sw/device/tests/dif/dif_rv_plic_smoketest.c
similarity index 76%
rename from sw/device/tests/dif/dif_plic_smoketest.c
rename to sw/device/tests/dif/dif_rv_plic_smoketest.c
index 470e616..c96a70b 100644
--- a/sw/device/tests/dif/dif_plic_smoketest.c
+++ b/sw/device/tests/dif/dif_rv_plic_smoketest.c
@@ -2,9 +2,8 @@
// Licensed under the Apache License, Version 2.0, see LICENSE for details.
// SPDX-License-Identifier: Apache-2.0
-#include "sw/device/lib/dif/dif_plic.h"
-
#include "sw/device/lib/base/mmio.h"
+#include "sw/device/lib/dif/dif_rv_plic.h"
#include "sw/device/lib/dif/dif_uart.h"
#include "sw/device/lib/handler.h"
#include "sw/device/lib/irq.h"
@@ -18,7 +17,7 @@
static const uint32_t kPlicTarget = kTopEarlgreyPlicTargetIbex0;
-static dif_plic_t plic0;
+static dif_rv_plic_t plic0;
static dif_uart_t uart0;
// These flags are used in the test routine to verify that a corresponding
@@ -34,7 +33,7 @@
* Services UART interrupts, sets the appropriate flags that are used to
* determine success or failure of the test.
*/
-static void handle_uart_isr(const dif_plic_irq_id_t interrupt_id) {
+static void handle_uart_isr(const dif_rv_plic_irq_id_t interrupt_id) {
// NOTE: This initialization is superfluous, since the `default` case below
// is effectively noreturn, but the compiler is unable to prove this.
dif_uart_irq_t uart_irq = 0;
@@ -73,9 +72,10 @@
*/
void handler_irq_external(void) {
// Claim the IRQ by reading the Ibex specific CC register.
- dif_plic_irq_id_t interrupt_id;
- CHECK(dif_plic_irq_claim(&plic0, kPlicTarget, &interrupt_id) == kDifPlicOk,
- "ISR is not implemented!");
+ dif_rv_plic_irq_id_t interrupt_id;
+ CHECK(
+ dif_rv_plic_irq_claim(&plic0, kPlicTarget, &interrupt_id) == kDifRvPlicOk,
+ "ISR is not implemented!");
// Check if the interrupted peripheral is UART.
top_earlgrey_plic_peripheral_t peripheral_id =
@@ -86,7 +86,8 @@
// Complete the IRQ by writing the IRQ source to the Ibex specific CC
// register.
- CHECK(dif_plic_irq_complete(&plic0, kPlicTarget, interrupt_id) == kDifPlicOk,
+ CHECK(dif_rv_plic_irq_complete(&plic0, kPlicTarget, interrupt_id) ==
+ kDifRvPlicOk,
"Unable to complete the IRQ request!");
}
@@ -106,9 +107,9 @@
"UART config failed!");
}
-static void plic_initialise(mmio_region_t base_addr, dif_plic_t *plic) {
- CHECK(dif_plic_init((dif_plic_params_t){.base_addr = base_addr}, plic) ==
- kDifPlicOk,
+static void plic_initialise(mmio_region_t base_addr, dif_rv_plic_t *plic) {
+ CHECK(dif_rv_plic_init((dif_rv_plic_params_t){.base_addr = base_addr},
+ plic) == kDifRvPlicOk,
"PLIC init failed!");
}
@@ -127,38 +128,38 @@
/**
* Configures all the relevant interrupts in PLIC.
*/
-static void plic_configure_irqs(dif_plic_t *plic) {
+static void plic_configure_irqs(dif_rv_plic_t *plic) {
// Set IRQ triggers to be level triggered
- CHECK(dif_plic_irq_set_trigger(plic, kTopEarlgreyPlicIrqIdUart0RxOverflow,
- kDifPlicIrqTriggerLevel) == kDifPlicOk,
+ CHECK(dif_rv_plic_irq_set_trigger(plic, kTopEarlgreyPlicIrqIdUart0RxOverflow,
+ kDifRvPlicIrqTriggerLevel) == kDifRvPlicOk,
"RX overflow trigger type set failed!");
- CHECK(dif_plic_irq_set_trigger(plic, kTopEarlgreyPlicIrqIdUart0TxEmpty,
- kDifPlicIrqTriggerLevel) == kDifPlicOk,
+ CHECK(dif_rv_plic_irq_set_trigger(plic, kTopEarlgreyPlicIrqIdUart0TxEmpty,
+ kDifRvPlicIrqTriggerLevel) == kDifRvPlicOk,
"TX empty trigger type set failed!");
// Set IRQ priorities to MAX
- CHECK(dif_plic_irq_set_priority(plic, kTopEarlgreyPlicIrqIdUart0RxOverflow,
- kDifPlicMaxPriority) == kDifPlicOk,
+ CHECK(dif_rv_plic_irq_set_priority(plic, kTopEarlgreyPlicIrqIdUart0RxOverflow,
+ kDifRvPlicMaxPriority) == kDifRvPlicOk,
"priority set for RX overflow failed!");
- CHECK(dif_plic_irq_set_priority(plic, kTopEarlgreyPlicIrqIdUart0TxEmpty,
- kDifPlicMaxPriority) == kDifPlicOk,
+ CHECK(dif_rv_plic_irq_set_priority(plic, kTopEarlgreyPlicIrqIdUart0TxEmpty,
+ kDifRvPlicMaxPriority) == kDifRvPlicOk,
"priority set for TX empty failed!");
// Set Ibex IRQ priority threshold level
- CHECK(dif_plic_target_set_threshold(&plic0, kPlicTarget,
- kDifPlicMinPriority) == kDifPlicOk,
+ CHECK(dif_rv_plic_target_set_threshold(&plic0, kPlicTarget,
+ kDifRvPlicMinPriority) == kDifRvPlicOk,
"threshold set failed!");
// Enable IRQs in PLIC
- CHECK(dif_plic_irq_set_enabled(plic, kTopEarlgreyPlicIrqIdUart0RxOverflow,
- kPlicTarget,
- kDifPlicToggleEnabled) == kDifPlicOk,
+ CHECK(dif_rv_plic_irq_set_enabled(plic, kTopEarlgreyPlicIrqIdUart0RxOverflow,
+ kPlicTarget,
+ kDifRvPlicToggleEnabled) == kDifRvPlicOk,
"interrupt Enable for RX overflow failed!");
- CHECK(dif_plic_irq_set_enabled(plic, kTopEarlgreyPlicIrqIdUart0TxEmpty,
- kPlicTarget,
- kDifPlicToggleEnabled) == kDifPlicOk,
+ CHECK(dif_rv_plic_irq_set_enabled(plic, kTopEarlgreyPlicIrqIdUart0TxEmpty,
+ kPlicTarget,
+ kDifRvPlicToggleEnabled) == kDifRvPlicOk,
"interrupt Enable for TX empty failed!");
}
diff --git a/sw/device/tests/dif/meson.build b/sw/device/tests/dif/meson.build
index 2bc9499..a7e6594 100644
--- a/sw/device/tests/dif/meson.build
+++ b/sw/device/tests/dif/meson.build
@@ -2,13 +2,13 @@
# Licensed under the Apache License, Version 2.0, see LICENSE for details.
# SPDX-License-Identifier: Apache-2.0
-dif_plic_smoketest_lib = declare_dependency(
+dif_rv_plic_smoketest_lib = declare_dependency(
link_with: static_library(
- 'dif_plic_smoketest_lib',
- sources: ['dif_plic_smoketest.c'],
+ 'dif_rv_plic_smoketest_lib',
+ sources: ['dif_rv_plic_smoketest.c'],
dependencies: [
sw_lib_dif_uart,
- sw_lib_dif_plic,
+ sw_lib_dif_rv_plic,
sw_lib_irq,
sw_lib_mmio,
sw_lib_runtime_log,
@@ -18,8 +18,8 @@
),
)
sw_tests += {
- 'dif_plic_smoketest': {
- 'library': dif_plic_smoketest_lib,
+ 'dif_rv_plic_smoketest': {
+ 'library': dif_rv_plic_smoketest_lib,
}
}
diff --git a/sw/device/tests/sim_dv/gpio_test.c b/sw/device/tests/sim_dv/gpio_test.c
index 23f14d8..23b5562 100644
--- a/sw/device/tests/sim_dv/gpio_test.c
+++ b/sw/device/tests/sim_dv/gpio_test.c
@@ -2,11 +2,10 @@
// Licensed under the Apache License, Version 2.0, see LICENSE for details.
// SPDX-License-Identifier: Apache-2.0
-#include "sw/device/lib/dif/dif_gpio.h"
-
#include "sw/device/lib/arch/device.h"
#include "sw/device/lib/base/mmio.h"
-#include "sw/device/lib/dif/dif_plic.h"
+#include "sw/device/lib/dif/dif_gpio.h"
+#include "sw/device/lib/dif/dif_rv_plic.h"
#include "sw/device/lib/handler.h"
#include "sw/device/lib/irq.h"
#include "sw/device/lib/pinmux.h"
@@ -15,10 +14,11 @@
#include "sw/device/lib/testing/check.h"
#include "sw/device/lib/testing/test_main.h"
#include "sw/device/lib/testing/test_status.h"
+
#include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"
static dif_gpio_t gpio;
-static dif_plic_t plic;
+static dif_rv_plic_t plic;
// These constants reflect the GPIOs exposed by the GPIO IP.
static const uint32_t kNumGpios = 32;
@@ -65,36 +65,36 @@
/**
* Initializes PLIC and enables all GPIO interrupts.
*/
-static void plic_init_with_irqs(mmio_region_t base_addr, dif_plic_t *plic) {
+static void plic_init_with_irqs(mmio_region_t base_addr, dif_rv_plic_t *plic) {
LOG_INFO("Initializing the PLIC.");
- CHECK(dif_plic_init((dif_plic_params_t){.base_addr = base_addr}, plic) ==
- kDifPlicOk,
- "dif_plic_init failed");
+ CHECK(dif_rv_plic_init((dif_rv_plic_params_t){.base_addr = base_addr},
+ plic) == kDifRvPlicOk,
+ "dif_rv_plic_init failed");
for (uint32_t i = 0; i < kNumGpios; ++i) {
- dif_plic_irq_id_t plic_irq_id = i + kTopEarlgreyPlicIrqIdGpioGpio0;
+ dif_rv_plic_irq_id_t plic_irq_id = i + kTopEarlgreyPlicIrqIdGpioGpio0;
// Enable GPIO interrupts at PLIC as edge triggered.
- CHECK(dif_plic_irq_set_trigger(plic, plic_irq_id, kDifPlicIrqTriggerEdge) ==
- kDifPlicOk,
- "dif_plic_irq_set_trigger failed");
+ CHECK(dif_rv_plic_irq_set_trigger(plic, plic_irq_id,
+ kDifRvPlicIrqTriggerEdge) == kDifRvPlicOk,
+ "dif_rv_plic_irq_set_trigger failed");
// Set the priority of GPIO interrupts at PLIC to be >=1
- CHECK(dif_plic_irq_set_priority(plic, plic_irq_id, 0x1) == kDifPlicOk,
- "dif_plic_irq_set_priority failed");
+ CHECK(dif_rv_plic_irq_set_priority(plic, plic_irq_id, 0x1) == kDifRvPlicOk,
+ "dif_rv_plic_irq_set_priority failed");
// Enable all GPIO interrupts at the PLIC.
- CHECK(
- dif_plic_irq_set_enabled(plic, plic_irq_id, kTopEarlgreyPlicTargetIbex0,
- kDifPlicToggleEnabled) == kDifPlicOk,
- "dif_plic_irq_set_enabled failed");
+ CHECK(dif_rv_plic_irq_set_enabled(plic, plic_irq_id,
+ kTopEarlgreyPlicTargetIbex0,
+ kDifRvPlicToggleEnabled) == kDifRvPlicOk,
+ "dif_rv_plic_irq_set_enabled failed");
}
// Set the threshold for the Ibex to 0.
- CHECK(dif_plic_target_set_threshold(plic, kTopEarlgreyPlicTargetIbex0, 0x0) ==
- kDifPlicOk,
- "dif_plic_target_set_threshold failed");
+ CHECK(dif_rv_plic_target_set_threshold(plic, kTopEarlgreyPlicTargetIbex0,
+ 0x0) == kDifRvPlicOk,
+ "dif_rv_plic_target_set_threshold failed");
}
/**
@@ -225,10 +225,10 @@
*/
void handler_irq_external(void) {
// Find which interrupt fired at PLIC by claiming it.
- dif_plic_irq_id_t plic_irq_id;
- CHECK(dif_plic_irq_claim(&plic, kTopEarlgreyPlicTargetIbex0, &plic_irq_id) ==
- kDifPlicOk,
- "dif_plic_irq_claim failed");
+ dif_rv_plic_irq_id_t plic_irq_id;
+ CHECK(dif_rv_plic_irq_claim(&plic, kTopEarlgreyPlicTargetIbex0,
+ &plic_irq_id) == kDifRvPlicOk,
+ "dif_rv_plic_irq_claim failed");
// Check if it is the right peripheral.
top_earlgrey_plic_peripheral_t peripheral = (top_earlgrey_plic_peripheral_t)
@@ -267,9 +267,9 @@
"dif_gpio_irq_acknowledge failed");
// Complete the IRQ at PLIC.
- CHECK(dif_plic_irq_complete(&plic, kTopEarlgreyPlicTargetIbex0,
- plic_irq_id) == kDifPlicOk,
- "dif_plic_irq_complete failed");
+ CHECK(dif_rv_plic_irq_complete(&plic, kTopEarlgreyPlicTargetIbex0,
+ plic_irq_id) == kDifRvPlicOk,
+ "dif_rv_plic_irq_complete failed");
}
const test_config_t kTestConfig;
diff --git a/sw/device/tests/sim_dv/meson.build b/sw/device/tests/sim_dv/meson.build
index 011a530..1924685 100644
--- a/sw/device/tests/sim_dv/meson.build
+++ b/sw/device/tests/sim_dv/meson.build
@@ -11,7 +11,7 @@
'uart_tx_rx_test.c'],
dependencies: [
sw_lib_dif_uart,
- sw_lib_dif_plic,
+ sw_lib_dif_rv_plic,
sw_lib_irq,
sw_lib_mmio,
sw_lib_runtime_log,
@@ -34,7 +34,7 @@
sources: ['gpio_test.c'],
dependencies: [
sw_lib_dif_gpio,
- sw_lib_dif_plic,
+ sw_lib_dif_rv_plic,
sw_lib_irq,
sw_lib_mmio,
sw_lib_pinmux,
@@ -77,7 +77,7 @@
sources: ['spi_tx_rx_test.c'],
dependencies: [
sw_lib_dif_spi_device,
- sw_lib_dif_plic,
+ sw_lib_dif_rv_plic,
sw_lib_irq,
sw_lib_mmio,
sw_lib_runtime_log,
diff --git a/sw/device/tests/sim_dv/spi_tx_rx_test.c b/sw/device/tests/sim_dv/spi_tx_rx_test.c
index 928c8c0..d6214f9 100644
--- a/sw/device/tests/sim_dv/spi_tx_rx_test.c
+++ b/sw/device/tests/sim_dv/spi_tx_rx_test.c
@@ -4,7 +4,7 @@
#include "sw/device/lib/arch/device.h"
#include "sw/device/lib/base/mmio.h"
-#include "sw/device/lib/dif/dif_plic.h"
+#include "sw/device/lib/dif/dif_rv_plic.h"
#include "sw/device/lib/dif/dif_spi_device.h"
#include "sw/device/lib/handler.h"
#include "sw/device/lib/irq.h"
@@ -20,7 +20,7 @@
#define SPI_DEVICE_NUM_IRQS 6
static const uint16_t kFifoLen = 0x400;
-static dif_plic_t plic0;
+static dif_rv_plic_t plic0;
static dif_spi_device_t spi_device;
// A set of bytes to be send out by spi_device.
@@ -69,10 +69,10 @@
*/
void handler_irq_external(void) {
// Find which interrupt fired at PLIC by claiming it.
- dif_plic_irq_id_t plic_irq_id;
- CHECK(dif_plic_irq_claim(&plic0, kTopEarlgreyPlicTargetIbex0, &plic_irq_id) ==
- kDifPlicOk,
- "dif_plic_irq_claim failed");
+ dif_rv_plic_irq_id_t plic_irq_id;
+ CHECK(dif_rv_plic_irq_claim(&plic0, kTopEarlgreyPlicTargetIbex0,
+ &plic_irq_id) == kDifRvPlicOk,
+ "dif_rv_plic_irq_claim failed");
// Check if it is the right peripheral.
top_earlgrey_plic_peripheral_t peripheral = (top_earlgrey_plic_peripheral_t)
@@ -129,9 +129,9 @@
"dif_spi_device_irq_state_clear failed");
// Complete the IRQ at PLIC.
- CHECK(dif_plic_irq_complete(&plic0, kTopEarlgreyPlicTargetIbex0,
- plic_irq_id) == kDifPlicOk,
- "dif_plic_irq_complete failed");
+ CHECK(dif_rv_plic_irq_complete(&plic0, kTopEarlgreyPlicTargetIbex0,
+ plic_irq_id) == kDifRvPlicOk,
+ "dif_rv_plic_irq_complete failed");
}
/**
@@ -193,91 +193,94 @@
/**
* Initializes PLIC and enables the relevant SPI DEVICE interrupts.
*/
-static void plic_init_with_irqs(mmio_region_t base_addr, dif_plic_t *plic) {
+static void plic_init_with_irqs(mmio_region_t base_addr, dif_rv_plic_t *plic) {
LOG_INFO("Initializing the PLIC.");
- CHECK(dif_plic_init((dif_plic_params_t){.base_addr = base_addr}, plic) ==
- kDifPlicOk,
- "dif_plic_init failed");
+ CHECK(dif_rv_plic_init((dif_rv_plic_params_t){.base_addr = base_addr},
+ plic) == kDifRvPlicOk,
+ "dif_rv_plic_init failed");
// Enable SPI_DEVICE interrupts at PLIC as edge triggered.
- CHECK(dif_plic_irq_set_trigger(plic, kTopEarlgreyPlicIrqIdSpiDeviceRxf,
- kDifPlicIrqTriggerEdge) == kDifPlicOk,
- "dif_plic_irq_set_trigger failed");
- CHECK(dif_plic_irq_set_trigger(plic, kTopEarlgreyPlicIrqIdSpiDeviceRxlvl,
- kDifPlicIrqTriggerEdge) == kDifPlicOk,
- "dif_plic_irq_set_trigger failed");
- CHECK(dif_plic_irq_set_trigger(plic, kTopEarlgreyPlicIrqIdSpiDeviceTxlvl,
- kDifPlicIrqTriggerEdge) == kDifPlicOk,
- "dif_plic_irq_set_trigger failed");
- CHECK(dif_plic_irq_set_trigger(plic, kTopEarlgreyPlicIrqIdSpiDeviceRxerr,
- kDifPlicIrqTriggerEdge) == kDifPlicOk,
- "dif_plic_irq_set_trigger failed");
- CHECK(dif_plic_irq_set_trigger(plic, kTopEarlgreyPlicIrqIdSpiDeviceRxoverflow,
- kDifPlicIrqTriggerEdge) == kDifPlicOk,
- "dif_plic_irq_set_trigger failed");
- CHECK(
- dif_plic_irq_set_trigger(plic, kTopEarlgreyPlicIrqIdSpiDeviceTxunderflow,
- kDifPlicIrqTriggerEdge) == kDifPlicOk,
- "dif_plic_irq_set_trigger failed");
+ CHECK(dif_rv_plic_irq_set_trigger(plic, kTopEarlgreyPlicIrqIdSpiDeviceRxf,
+ kDifRvPlicIrqTriggerEdge) == kDifRvPlicOk,
+ "dif_rv_plic_irq_set_trigger failed");
+ CHECK(dif_rv_plic_irq_set_trigger(plic, kTopEarlgreyPlicIrqIdSpiDeviceRxlvl,
+ kDifRvPlicIrqTriggerEdge) == kDifRvPlicOk,
+ "dif_rv_plic_irq_set_trigger failed");
+ CHECK(dif_rv_plic_irq_set_trigger(plic, kTopEarlgreyPlicIrqIdSpiDeviceTxlvl,
+ kDifRvPlicIrqTriggerEdge) == kDifRvPlicOk,
+ "dif_rv_plic_irq_set_trigger failed");
+ CHECK(dif_rv_plic_irq_set_trigger(plic, kTopEarlgreyPlicIrqIdSpiDeviceRxerr,
+ kDifRvPlicIrqTriggerEdge) == kDifRvPlicOk,
+ "dif_rv_plic_irq_set_trigger failed");
+ CHECK(dif_rv_plic_irq_set_trigger(plic,
+ kTopEarlgreyPlicIrqIdSpiDeviceRxoverflow,
+ kDifRvPlicIrqTriggerEdge) == kDifRvPlicOk,
+ "dif_rv_plic_irq_set_trigger failed");
+ CHECK(dif_rv_plic_irq_set_trigger(plic,
+ kTopEarlgreyPlicIrqIdSpiDeviceTxunderflow,
+ kDifRvPlicIrqTriggerEdge) == kDifRvPlicOk,
+ "dif_rv_plic_irq_set_trigger failed");
// Set the priority of SPI DEVICE interrupts at PLIC to be >=1 (so ensure the
// target does get interrupted).
- CHECK(dif_plic_irq_set_priority(plic, kTopEarlgreyPlicIrqIdSpiDeviceRxf,
- kDifPlicMaxPriority) == kDifPlicOk,
- "dif_plic_irq_set_priority failed");
- CHECK(dif_plic_irq_set_priority(plic, kTopEarlgreyPlicIrqIdSpiDeviceRxlvl,
- kDifPlicMaxPriority) == kDifPlicOk,
- "dif_plic_irq_set_priority failed");
- CHECK(dif_plic_irq_set_priority(plic, kTopEarlgreyPlicIrqIdSpiDeviceTxlvl,
- kDifPlicMaxPriority) == kDifPlicOk,
- , "dif_plic_irq_set_priority failed");
- CHECK(dif_plic_irq_set_priority(plic, kTopEarlgreyPlicIrqIdSpiDeviceRxerr,
- kDifPlicMaxPriority) == kDifPlicOk,
- "dif_plic_irq_set_priority failed");
- CHECK(
- dif_plic_irq_set_priority(plic, kTopEarlgreyPlicIrqIdSpiDeviceRxoverflow,
- kDifPlicMaxPriority) == kDifPlicOk,
- "dif_plic_irq_set_priority failed");
- CHECK(
- dif_plic_irq_set_priority(plic, kTopEarlgreyPlicIrqIdSpiDeviceTxunderflow,
- kDifPlicMaxPriority) == kDifPlicOk,
- "dif_plic_irq_set_priority failed");
+ CHECK(dif_rv_plic_irq_set_priority(plic, kTopEarlgreyPlicIrqIdSpiDeviceRxf,
+ kDifRvPlicMaxPriority) == kDifRvPlicOk,
+ "dif_rv_plic_irq_set_priority failed");
+ CHECK(dif_rv_plic_irq_set_priority(plic, kTopEarlgreyPlicIrqIdSpiDeviceRxlvl,
+ kDifRvPlicMaxPriority) == kDifRvPlicOk,
+ "dif_rv_plic_irq_set_priority failed");
+ CHECK(dif_rv_plic_irq_set_priority(plic, kTopEarlgreyPlicIrqIdSpiDeviceTxlvl,
+ kDifRvPlicMaxPriority) == kDifRvPlicOk,
+ , "dif_rv_plic_irq_set_priority failed");
+ CHECK(dif_rv_plic_irq_set_priority(plic, kTopEarlgreyPlicIrqIdSpiDeviceRxerr,
+ kDifRvPlicMaxPriority) == kDifRvPlicOk,
+ "dif_rv_plic_irq_set_priority failed");
+ CHECK(dif_rv_plic_irq_set_priority(plic,
+ kTopEarlgreyPlicIrqIdSpiDeviceRxoverflow,
+ kDifRvPlicMaxPriority) == kDifRvPlicOk,
+ "dif_rv_plic_irq_set_priority failed");
+ CHECK(dif_rv_plic_irq_set_priority(plic,
+ kTopEarlgreyPlicIrqIdSpiDeviceTxunderflow,
+ kDifRvPlicMaxPriority) == kDifRvPlicOk,
+ "dif_rv_plic_irq_set_priority failed");
// Set the threshold for the Ibex to 0.
- CHECK(dif_plic_target_set_threshold(plic, kTopEarlgreyPlicTargetIbex0, 0x0) ==
- kDifPlicOk,
- "dif_plic_target_set_threshold failed");
+ CHECK(dif_rv_plic_target_set_threshold(plic, kTopEarlgreyPlicTargetIbex0,
+ 0x0) == kDifRvPlicOk,
+ "dif_rv_plic_target_set_threshold failed");
- CHECK(dif_plic_irq_set_enabled(plic, kTopEarlgreyPlicIrqIdSpiDeviceRxf,
- kTopEarlgreyPlicTargetIbex0,
- kDifPlicToggleEnabled) == kDifPlicOk,
- "dif_plic_irq_set_enabled failed");
+ CHECK(dif_rv_plic_irq_set_enabled(plic, kTopEarlgreyPlicIrqIdSpiDeviceRxf,
+ kTopEarlgreyPlicTargetIbex0,
+ kDifRvPlicToggleEnabled) == kDifRvPlicOk,
+ "dif_rv_plic_irq_set_enabled failed");
- CHECK(dif_plic_irq_set_enabled(plic, kTopEarlgreyPlicIrqIdSpiDeviceRxlvl,
- kTopEarlgreyPlicTargetIbex0,
- kDifPlicToggleEnabled) == kDifPlicOk,
- "dif_plic_irq_set_enabled failed");
+ CHECK(dif_rv_plic_irq_set_enabled(plic, kTopEarlgreyPlicIrqIdSpiDeviceRxlvl,
+ kTopEarlgreyPlicTargetIbex0,
+ kDifRvPlicToggleEnabled) == kDifRvPlicOk,
+ "dif_rv_plic_irq_set_enabled failed");
- CHECK(dif_plic_irq_set_enabled(plic, kTopEarlgreyPlicIrqIdSpiDeviceTxlvl,
- kTopEarlgreyPlicTargetIbex0,
- kDifPlicToggleEnabled) == kDifPlicOk,
- "dif_plic_irq_set_enabled failed");
+ CHECK(dif_rv_plic_irq_set_enabled(plic, kTopEarlgreyPlicIrqIdSpiDeviceTxlvl,
+ kTopEarlgreyPlicTargetIbex0,
+ kDifRvPlicToggleEnabled) == kDifRvPlicOk,
+ "dif_rv_plic_irq_set_enabled failed");
- CHECK(dif_plic_irq_set_enabled(plic, kTopEarlgreyPlicIrqIdSpiDeviceRxerr,
- kTopEarlgreyPlicTargetIbex0,
- kDifPlicToggleEnabled) == kDifPlicOk,
- "dif_plic_irq_set_enabled failed");
+ CHECK(dif_rv_plic_irq_set_enabled(plic, kTopEarlgreyPlicIrqIdSpiDeviceRxerr,
+ kTopEarlgreyPlicTargetIbex0,
+ kDifRvPlicToggleEnabled) == kDifRvPlicOk,
+ "dif_rv_plic_irq_set_enabled failed");
- CHECK(dif_plic_irq_set_enabled(plic, kTopEarlgreyPlicIrqIdSpiDeviceRxoverflow,
- kTopEarlgreyPlicTargetIbex0,
- kDifPlicToggleEnabled) == kDifPlicOk,
- "dif_plic_irq_set_enabled failed");
+ CHECK(dif_rv_plic_irq_set_enabled(plic,
+ kTopEarlgreyPlicIrqIdSpiDeviceRxoverflow,
+ kTopEarlgreyPlicTargetIbex0,
+ kDifRvPlicToggleEnabled) == kDifRvPlicOk,
+ "dif_rv_plic_irq_set_enabled failed");
- CHECK(dif_plic_irq_set_enabled(
- plic, kTopEarlgreyPlicIrqIdSpiDeviceTxunderflow,
- kTopEarlgreyPlicTargetIbex0, kDifPlicToggleEnabled) == kDifPlicOk,
- "dif_plic_irq_set_enabled failed");
+ CHECK(dif_rv_plic_irq_set_enabled(plic,
+ kTopEarlgreyPlicIrqIdSpiDeviceTxunderflow,
+ kTopEarlgreyPlicTargetIbex0,
+ kDifRvPlicToggleEnabled) == kDifRvPlicOk,
+ "dif_rv_plic_irq_set_enabled failed");
}
static bool exp_irqs_fired(void) {
diff --git a/sw/device/tests/sim_dv/uart_tx_rx_test.c b/sw/device/tests/sim_dv/uart_tx_rx_test.c
index 23168eb..a3437d7 100644
--- a/sw/device/tests/sim_dv/uart_tx_rx_test.c
+++ b/sw/device/tests/sim_dv/uart_tx_rx_test.c
@@ -4,7 +4,7 @@
#include "sw/device/lib/arch/device.h"
#include "sw/device/lib/base/mmio.h"
-#include "sw/device/lib/dif/dif_plic.h"
+#include "sw/device/lib/dif/dif_rv_plic.h"
#include "sw/device/lib/dif/dif_uart.h"
#include "sw/device/lib/handler.h"
#include "sw/device/lib/irq.h"
@@ -22,7 +22,7 @@
#define UART_DATASET_SIZE 128
static dif_uart_t uart;
-static dif_plic_t plic;
+static dif_rv_plic_t plic;
/**
* UART TX RX test
@@ -220,10 +220,10 @@
*/
void handler_irq_external(void) {
// Find which interrupt fired at PLIC by claiming it.
- dif_plic_irq_id_t plic_irq_id;
- CHECK(dif_plic_irq_claim(&plic, kTopEarlgreyPlicTargetIbex0, &plic_irq_id) ==
- kDifPlicOk,
- "dif_plic_irq_claim failed");
+ dif_rv_plic_irq_id_t plic_irq_id;
+ CHECK(dif_rv_plic_irq_claim(&plic, kTopEarlgreyPlicTargetIbex0,
+ &plic_irq_id) == kDifRvPlicOk,
+ "dif_rv_plic_irq_claim failed");
// Check if it is the right peripheral.
top_earlgrey_plic_peripheral_t peripheral = (top_earlgrey_plic_peripheral_t)
@@ -269,9 +269,9 @@
"dif_uart_irq_acknowledge failed");
// Complete the IRQ at PLIC.
- CHECK(dif_plic_irq_complete(&plic, kTopEarlgreyPlicTargetIbex0,
- plic_irq_id) == kDifPlicOk,
- "dif_plic_irq_complete failed");
+ CHECK(dif_rv_plic_irq_complete(&plic, kTopEarlgreyPlicTargetIbex0,
+ plic_irq_id) == kDifRvPlicOk,
+ "dif_rv_plic_irq_complete failed");
}
/**
@@ -319,111 +319,111 @@
/**
* Initializes PLIC and enables the relevant UART interrupts.
*/
-static void plic_init_with_irqs(mmio_region_t base_addr, dif_plic_t *plic) {
+static void plic_init_with_irqs(mmio_region_t base_addr, dif_rv_plic_t *plic) {
LOG_INFO("Initializing the PLIC. %0x", uart_irq_tx_watermartk_id);
- CHECK(dif_plic_init((dif_plic_params_t){.base_addr = base_addr}, plic) ==
- kDifPlicOk,
- "dif_plic_init failed");
+ CHECK(dif_rv_plic_init((dif_rv_plic_params_t){.base_addr = base_addr},
+ plic) == kDifRvPlicOk,
+ "dif_rv_plic_init failed");
// Enable UART interrupts at PLIC as edge triggered.
- CHECK(dif_plic_irq_set_trigger(plic, uart_irq_tx_watermartk_id,
- kDifPlicIrqTriggerEdge) == kDifPlicOk,
- "dif_plic_irq_set_trigger failed");
- CHECK(dif_plic_irq_set_trigger(plic, uart_irq_rx_watermartk_id,
- kDifPlicIrqTriggerEdge) == kDifPlicOk,
- "dif_plic_irq_set_trigger failed");
- CHECK(dif_plic_irq_set_trigger(plic, uart_irq_tx_empty_id,
- kDifPlicIrqTriggerEdge) == kDifPlicOk,
- "dif_plic_irq_set_trigger failed");
- CHECK(dif_plic_irq_set_trigger(plic, uart_irq_rx_overflow_id,
- kDifPlicIrqTriggerEdge) == kDifPlicOk,
- "dif_plic_irq_set_trigger failed");
- CHECK(dif_plic_irq_set_trigger(plic, uart_irq_rx_frame_err_id,
- kDifPlicIrqTriggerEdge) == kDifPlicOk,
- "dif_plic_irq_set_trigger failed");
- CHECK(dif_plic_irq_set_trigger(plic, uart_irq_rx_break_err_id,
- kDifPlicIrqTriggerEdge) == kDifPlicOk,
- "dif_plic_irq_set_trigger failed");
- CHECK(dif_plic_irq_set_trigger(plic, uart_irq_rx_timeout_id,
- kDifPlicIrqTriggerEdge) == kDifPlicOk,
- "dif_plic_irq_set_trigger failed");
- CHECK(dif_plic_irq_set_trigger(plic, uart_irq_rx_parity_err_id,
- kDifPlicIrqTriggerEdge) == kDifPlicOk,
- "dif_plic_irq_set_trigger failed");
+ CHECK(dif_rv_plic_irq_set_trigger(plic, uart_irq_tx_watermartk_id,
+ kDifRvPlicIrqTriggerEdge) == kDifRvPlicOk,
+ "dif_rv_plic_irq_set_trigger failed");
+ CHECK(dif_rv_plic_irq_set_trigger(plic, uart_irq_rx_watermartk_id,
+ kDifRvPlicIrqTriggerEdge) == kDifRvPlicOk,
+ "dif_rv_plic_irq_set_trigger failed");
+ CHECK(dif_rv_plic_irq_set_trigger(plic, uart_irq_tx_empty_id,
+ kDifRvPlicIrqTriggerEdge) == kDifRvPlicOk,
+ "dif_rv_plic_irq_set_trigger failed");
+ CHECK(dif_rv_plic_irq_set_trigger(plic, uart_irq_rx_overflow_id,
+ kDifRvPlicIrqTriggerEdge) == kDifRvPlicOk,
+ "dif_rv_plic_irq_set_trigger failed");
+ CHECK(dif_rv_plic_irq_set_trigger(plic, uart_irq_rx_frame_err_id,
+ kDifRvPlicIrqTriggerEdge) == kDifRvPlicOk,
+ "dif_rv_plic_irq_set_trigger failed");
+ CHECK(dif_rv_plic_irq_set_trigger(plic, uart_irq_rx_break_err_id,
+ kDifRvPlicIrqTriggerEdge) == kDifRvPlicOk,
+ "dif_rv_plic_irq_set_trigger failed");
+ CHECK(dif_rv_plic_irq_set_trigger(plic, uart_irq_rx_timeout_id,
+ kDifRvPlicIrqTriggerEdge) == kDifRvPlicOk,
+ "dif_rv_plic_irq_set_trigger failed");
+ CHECK(dif_rv_plic_irq_set_trigger(plic, uart_irq_rx_parity_err_id,
+ kDifRvPlicIrqTriggerEdge) == kDifRvPlicOk,
+ "dif_rv_plic_irq_set_trigger failed");
// Set the priority of UART interrupts at PLIC to be >=1 (so ensure the target
// does get interrupted).
- CHECK(dif_plic_irq_set_priority(plic, uart_irq_tx_watermartk_id, 0x1) ==
- kDifPlicOk,
- "dif_plic_irq_set_priority failed");
- CHECK(dif_plic_irq_set_priority(plic, uart_irq_rx_watermartk_id, 0x2) ==
- kDifPlicOk,
- "dif_plic_irq_set_priority failed");
- CHECK(
- dif_plic_irq_set_priority(plic, uart_irq_tx_empty_id, 0x3) == kDifPlicOk,
- , "dif_plic_irq_set_priority failed");
- CHECK(dif_plic_irq_set_priority(plic, uart_irq_rx_overflow_id, 0x1) ==
- kDifPlicOk,
- "dif_plic_irq_set_priority failed");
- CHECK(dif_plic_irq_set_priority(plic, uart_irq_rx_frame_err_id, 0x2) ==
- kDifPlicOk,
- "dif_plic_irq_set_priority failed");
- CHECK(dif_plic_irq_set_priority(plic, uart_irq_rx_break_err_id, 0x3) ==
- kDifPlicOk,
- "dif_plic_irq_set_priority failed");
- CHECK(dif_plic_irq_set_priority(plic, uart_irq_rx_timeout_id, 0x1) ==
- kDifPlicOk,
- "dif_plic_irq_set_priority failed");
- CHECK(dif_plic_irq_set_priority(plic, uart_irq_rx_parity_err_id, 0x2) ==
- kDifPlicOk,
- "dif_plic_irq_set_priority failed");
+ CHECK(dif_rv_plic_irq_set_priority(plic, uart_irq_tx_watermartk_id, 0x1) ==
+ kDifRvPlicOk,
+ "dif_rv_plic_irq_set_priority failed");
+ CHECK(dif_rv_plic_irq_set_priority(plic, uart_irq_rx_watermartk_id, 0x2) ==
+ kDifRvPlicOk,
+ "dif_rv_plic_irq_set_priority failed");
+ CHECK(dif_rv_plic_irq_set_priority(plic, uart_irq_tx_empty_id, 0x3) ==
+ kDifRvPlicOk,
+ , "dif_rv_plic_irq_set_priority failed");
+ CHECK(dif_rv_plic_irq_set_priority(plic, uart_irq_rx_overflow_id, 0x1) ==
+ kDifRvPlicOk,
+ "dif_rv_plic_irq_set_priority failed");
+ CHECK(dif_rv_plic_irq_set_priority(plic, uart_irq_rx_frame_err_id, 0x2) ==
+ kDifRvPlicOk,
+ "dif_rv_plic_irq_set_priority failed");
+ CHECK(dif_rv_plic_irq_set_priority(plic, uart_irq_rx_break_err_id, 0x3) ==
+ kDifRvPlicOk,
+ "dif_rv_plic_irq_set_priority failed");
+ CHECK(dif_rv_plic_irq_set_priority(plic, uart_irq_rx_timeout_id, 0x1) ==
+ kDifRvPlicOk,
+ "dif_rv_plic_irq_set_priority failed");
+ CHECK(dif_rv_plic_irq_set_priority(plic, uart_irq_rx_parity_err_id, 0x2) ==
+ kDifRvPlicOk,
+ "dif_rv_plic_irq_set_priority failed");
// Set the threshold for the Ibex to 0.
- CHECK(dif_plic_target_set_threshold(plic, kTopEarlgreyPlicTargetIbex0, 0x0) ==
- kDifPlicOk,
- "dif_plic_target_set_threshold failed");
+ CHECK(dif_rv_plic_target_set_threshold(plic, kTopEarlgreyPlicTargetIbex0,
+ 0x0) == kDifRvPlicOk,
+ "dif_rv_plic_target_set_threshold failed");
// Enable all UART interrupts at the PLIC.
- CHECK(dif_plic_irq_set_enabled(plic, uart_irq_tx_watermartk_id,
- kTopEarlgreyPlicTargetIbex0,
- kDifPlicToggleEnabled) == kDifPlicOk,
- "dif_plic_irq_set_enabled failed");
+ CHECK(dif_rv_plic_irq_set_enabled(plic, uart_irq_tx_watermartk_id,
+ kTopEarlgreyPlicTargetIbex0,
+ kDifRvPlicToggleEnabled) == kDifRvPlicOk,
+ "dif_rv_plic_irq_set_enabled failed");
- CHECK(dif_plic_irq_set_enabled(plic, uart_irq_rx_watermartk_id,
- kTopEarlgreyPlicTargetIbex0,
- kDifPlicToggleEnabled) == kDifPlicOk,
- "dif_plic_irq_set_enabled failed");
+ CHECK(dif_rv_plic_irq_set_enabled(plic, uart_irq_rx_watermartk_id,
+ kTopEarlgreyPlicTargetIbex0,
+ kDifRvPlicToggleEnabled) == kDifRvPlicOk,
+ "dif_rv_plic_irq_set_enabled failed");
- CHECK(dif_plic_irq_set_enabled(plic, uart_irq_tx_empty_id,
- kTopEarlgreyPlicTargetIbex0,
- kDifPlicToggleEnabled) == kDifPlicOk,
- "dif_plic_irq_set_enabled failed");
+ CHECK(dif_rv_plic_irq_set_enabled(plic, uart_irq_tx_empty_id,
+ kTopEarlgreyPlicTargetIbex0,
+ kDifRvPlicToggleEnabled) == kDifRvPlicOk,
+ "dif_rv_plic_irq_set_enabled failed");
- CHECK(dif_plic_irq_set_enabled(plic, uart_irq_rx_overflow_id,
- kTopEarlgreyPlicTargetIbex0,
- kDifPlicToggleEnabled) == kDifPlicOk,
- "dif_plic_irq_set_enabled failed");
+ CHECK(dif_rv_plic_irq_set_enabled(plic, uart_irq_rx_overflow_id,
+ kTopEarlgreyPlicTargetIbex0,
+ kDifRvPlicToggleEnabled) == kDifRvPlicOk,
+ "dif_rv_plic_irq_set_enabled failed");
- CHECK(dif_plic_irq_set_enabled(plic, uart_irq_rx_frame_err_id,
- kTopEarlgreyPlicTargetIbex0,
- kDifPlicToggleEnabled) == kDifPlicOk,
- "dif_plic_irq_set_enabled failed");
+ CHECK(dif_rv_plic_irq_set_enabled(plic, uart_irq_rx_frame_err_id,
+ kTopEarlgreyPlicTargetIbex0,
+ kDifRvPlicToggleEnabled) == kDifRvPlicOk,
+ "dif_rv_plic_irq_set_enabled failed");
- CHECK(dif_plic_irq_set_enabled(plic, uart_irq_rx_break_err_id,
- kTopEarlgreyPlicTargetIbex0,
- kDifPlicToggleEnabled) == kDifPlicOk,
- "dif_plic_irq_set_enabled failed");
+ CHECK(dif_rv_plic_irq_set_enabled(plic, uart_irq_rx_break_err_id,
+ kTopEarlgreyPlicTargetIbex0,
+ kDifRvPlicToggleEnabled) == kDifRvPlicOk,
+ "dif_rv_plic_irq_set_enabled failed");
- CHECK(dif_plic_irq_set_enabled(plic, uart_irq_rx_timeout_id,
- kTopEarlgreyPlicTargetIbex0,
- kDifPlicToggleEnabled) == kDifPlicOk,
- "dif_plic_irq_set_enabled failed");
+ CHECK(dif_rv_plic_irq_set_enabled(plic, uart_irq_rx_timeout_id,
+ kTopEarlgreyPlicTargetIbex0,
+ kDifRvPlicToggleEnabled) == kDifRvPlicOk,
+ "dif_rv_plic_irq_set_enabled failed");
- CHECK(dif_plic_irq_set_enabled(plic, uart_irq_rx_parity_err_id,
- kTopEarlgreyPlicTargetIbex0,
- kDifPlicToggleEnabled) == kDifPlicOk,
- "dif_plic_irq_set_enabled failed");
+ CHECK(dif_rv_plic_irq_set_enabled(plic, uart_irq_rx_parity_err_id,
+ kTopEarlgreyPlicTargetIbex0,
+ kDifRvPlicToggleEnabled) == kDifRvPlicOk,
+ "dif_rv_plic_irq_set_enabled failed");
}
/**
diff --git a/test/systemtest/earlgrey/config.py b/test/systemtest/earlgrey/config.py
index 7cadca0..dcefb33 100644
--- a/test/systemtest/earlgrey/config.py
+++ b/test/systemtest/earlgrey/config.py
@@ -62,7 +62,7 @@
"targets": ["sim_verilator", "fpga_cw310"],
},
{
- "name": "dif_plic_smoketest",
+ "name": "dif_rv_plic_smoketest",
"targets": ["sim_verilator", "fpga_cw310"],
},
# TODO(#6656): AST is not instantiated in chip_earlgrey_verilator.
@@ -146,7 +146,6 @@
"test_dir": "sw/device/silicon_creator/testing",
# Not running on sim_verilator because this test takes a long time to complete.
"targets": ["fpga_cw310", "fpga_nexysvideo"],
-
},
{
"name": "sw_silicon_creator_lib_driver_watchdog_functest",
diff --git a/util/check_dif_statuses.py b/util/check_dif_statuses.py
index c343f5a..c1bcda4 100644
--- a/util/check_dif_statuses.py
+++ b/util/check_dif_statuses.py
@@ -33,12 +33,6 @@
from tabulate import tabulate
from termcolor import colored
-# The IP suffix of some DIFs are slightly different than the IP directory name
-# in the hw/ip/ directory, so here is the translation for the applicable IPs.
-IP_TRANSLATION = {
- "plic": "rv_plic",
-}
-
class _OTComponent(Enum):
"""Type of OpenTitan component."""
@@ -81,8 +75,6 @@
raise ValueError("DIF name should start with \"dif_\".")
self.dif_name = dif_name
self.ip = self.dif_name[4:]
- if self.ip in IP_TRANSLATION:
- self.ip = IP_TRANSLATION[self.ip]
self.dif_path = os.path.join(difs_root_path, dif_name)
self.hw_path = f"hw/ip/{self.ip}"
# Determine last date DIF and HW was updated.
