commit cd19f9955762711f93fb39979cf241dc4c181f03
author Philipp Wagner <phw@lowrisc.org> Thu Jul 02 14:33:59 2020 +0100
committer Philipp Wagner <mail@philipp-wagner.com> Thu Jul 02 16:41:24 2020 +0100
tree 95ae12f2a1128625498c6810895958975f195e27
parent 04e6f183de69284ca36e11466eccfb7c2a8e560d

[reggen] Fix TypeError

Running reggen (e.g. through `make -C hw`) on the `v1-bronze` branch
fails with the following error message:

```
Traceback (most recent call last):
  File "/home/philipp/src/opentitan/util/topgen.py", line 964, in <module>
    main()
  File "/home/philipp/src/opentitan/util/topgen.py", line 860, in main
    generate_top_ral(completecfg, ip_objs, out_path)
  File "/home/philipp/src/opentitan/util/topgen.py", line 655, in generate_top_ral
    top_block.blocks.sort(key=lambda block: block.base_addr)
TypeError: '<' not supported between instances of 'int' and 'str'
```

Fix that by converting `base_addr` to str/int as necessary in all places
where it is used.

Signed-off-by: Philipp Wagner <phw@lowrisc.org>

util/reggen/gen_dv.py

diff --git a/util/reggen/gen_dv.py b/util/reggen/gen_dv.py
index ac0e225..351f867 100644
--- a/util/reggen/gen_dv.py
+++ b/util/reggen/gen_dv.py
@@ -39,8 +39,7 @@
 
 # function get base addr in SV syntax
 def sv_base_addr(b):
-    sv_base_addr = b.base_addr.replace("0x", str(b.width) + "'h")
-    return sv_base_addr
+    return "{}'h{:x}".format(b.width, b.base_addr)
 
 
 # function generate dv ral model using raw dict object parsed from hjson

util/topgen.py

diff --git a/util/topgen.py b/util/topgen.py
index 26a3b91..aa9d55b 100755
--- a/util/topgen.py
+++ b/util/topgen.py
@@ -667,7 +667,7 @@
     for block in top_block.blocks:
         for module in top["module"]:
             if block.name == module["name"]:
-                block.base_addr = module["base_addr"]
+                block.base_addr = int(module["base_addr"], 0)
                 break
 
     top_block.blocks.sort(key=lambda block: block.base_addr)