[sw/rom] Remove sec_mmio_write_increment function.

Remove sec_mmio_write_increment function as it is only replaced by a
macro.

Signed-off-by: Miguel Osorio <miguelosorio@google.com>
diff --git a/sw/device/silicon_creator/lib/base/mock_sec_mmio.h b/sw/device/silicon_creator/lib/base/mock_sec_mmio.h
index 4bf862c..a3c616b 100644
--- a/sw/device/silicon_creator/lib/base/mock_sec_mmio.h
+++ b/sw/device/silicon_creator/lib/base/mock_sec_mmio.h
@@ -25,7 +25,6 @@
   MOCK_METHOD(uint32_t, Read32, (uint32_t addr));
   MOCK_METHOD(void, Write32, (uint32_t addr, uint32_t value));
   MOCK_METHOD(void, Write32Shadowed, (uint32_t addr, uint32_t value));
-  MOCK_METHOD(void, WriteIncrement, (uint32_t value));
   MOCK_METHOD(void, CheckValues, (uint32_t rnd_offset));
   MOCK_METHOD(void, CheckCounters, (uint32_t expected_check_count));
 };
@@ -67,14 +66,6 @@
   EXPECT_CALL(::mask_rom_test::MockSecMmio::Instance(), \
               Write32Shadowed(addr, mock_mmio::ToInt<uint32_t>(__VA_ARGS__)));
 
-/**
- * Expect a write counter increment with a given 32-bit increment value.
- *
- * @param val Increment value.
- */
-#define EXPECT_SEC_WRITE_INCREMENT(val) \
-  EXPECT_CALL(::mask_rom_test::MockSecMmio::Instance(), WriteIncrement(val));
-
 extern "C" {
 
 void sec_mmio_init(void) { MockSecMmio::Instance().Init(); }
@@ -91,10 +82,6 @@
   MockSecMmio::Instance().Write32Shadowed(addr, value);
 }
 
-void sec_mmio_write_increment(uint32_t value) {
-  MockSecMmio::Instance().WriteIncrement(value);
-}
-
 void sec_mmio_check_values(uint32_t rnd_offset) {
   MockSecMmio::Instance().CheckValues(rnd_offset);
 }
diff --git a/sw/device/silicon_creator/lib/base/sec_mmio.c b/sw/device/silicon_creator/lib/base/sec_mmio.c
index 4cf6ef3..030f927 100644
--- a/sw/device/silicon_creator/lib/base/sec_mmio.c
+++ b/sw/device/silicon_creator/lib/base/sec_mmio.c
@@ -106,10 +106,6 @@
   ++sec_mmio_ctx.write_count;
 }
 
-void sec_mmio_write_increment(uint32_t value) {
-  SEC_MMIO_WRITE_INCREMENT(value);
-}
-
 void sec_mmio_check_values(uint32_t rnd_offset) {
   // Pick a random starting offset.
   uint32_t offset =
diff --git a/sw/device/silicon_creator/lib/base/sec_mmio.h b/sw/device/silicon_creator/lib/base/sec_mmio.h
index 328d0cb..c980255 100644
--- a/sw/device/silicon_creator/lib/base/sec_mmio.h
+++ b/sw/device/silicon_creator/lib/base/sec_mmio.h
@@ -30,8 +30,8 @@
  * Register writes
  *
  * - Perform a number (N) of calls to `sec_mmio_write32()`.
- * - Increment the expected number of writes by N by calling
- *   `sec_mmio_write_increment()`. This is done using a separate function call
+ * - Increment the expected number of writes by N with
+ *   `SEC_MMIO_WRITE_INCREMENT()`. This is done using a separate function call
  *   to be able to detect skip instruciton faults on `sec_mmio_write32()`
  *   calls.
  *
@@ -85,7 +85,7 @@
   uint32_t write_count;
   /**
    * Represents the expected number of register write operations. Incremented by
-   * the `sec_mmio_write_increment()` function.
+   * `SEC_MMIO_WRITE_INCREMENT()`.
    */
   uint32_t expected_write_count;
   /**
@@ -116,23 +116,20 @@
 /**
  * Increment the expected count of register writes by `value`.
  *
- * This macro is preferred over `sec_mmio_write_increment()` as it doesn't
- * require a function call to update the expected number of writes stored in
- * `sec_mmio_ctx`.
+ * This macro must be used to increment the number of expected register writes
+ * before calling `sec_mmio_check_counters()`.
  *
  * @param value The expected write count increment.
  */
-#define SEC_MMIO_WRITE_INCREMENT(value)           \
-  do {                                            \
-    sec_mmio_ctx.expected_write_count += (value); \
-  } while (0);
+#define SEC_MMIO_WRITE_INCREMENT(value) \
+  (sec_mmio_ctx.expected_write_count += (value))
 
 /**
  * Assert macro used to cross-reference exported sec_mmio expected write counts
  * to their respective functions.
  */
 #define SEC_MMIO_ASSERT_WRITE_INCREMENT(enum_val, expected) \
-  static_assert(enum_val == expected, "Unexpected value for " #enum_val);
+  static_assert(enum_val == expected, "Unexpected value for " #enum_val)
 
 /**
  * Initializes the module.
@@ -176,8 +173,8 @@
  * via `sec_mmio_check_values()`.
  *
  * On successful calls, this function will increment the internal count of
- * writes. The caller is responsible to setting the expected write count by
- * calling `sec_mmio_write_increment()`.
+ * writes. The caller is responsible to setting the expected write count with
+ * `SEC_MMIO_WRITE_INCREMENT()`.
  *
  * An exception is thrown if the comparison operation fails.
  *
@@ -195,8 +192,8 @@
  * values for later comparison via `sec_mmio_check_values()`.
  *
  * On successful calls, this function will increment the internal count of
- * writes. The caller is responsible to setting the expected write count by
- * calling `sec_mmio_write_increment()`.
+ * writes. The caller is responsible to setting the expected write count with
+ * `SEC_MMIO_WRITE_INCREMENT()`.
  *
  * An exception is thrown if the comparison operation fails.
  *
@@ -205,12 +202,6 @@
  */
 void sec_mmio_write32_shadowed(uint32_t addr, uint32_t value);
 
-/**
- * Increment the expected count of register writes by `value`.
- *
- * @param value The expected write count increment.
- */
-void sec_mmio_write_increment(uint32_t value);
 
 /**
  * Checks the expected list of register values.
diff --git a/sw/device/silicon_creator/lib/base/sec_mmio_unittest.cc b/sw/device/silicon_creator/lib/base/sec_mmio_unittest.cc
index 619fe07..d6f2a43 100644
--- a/sw/device/silicon_creator/lib/base/sec_mmio_unittest.cc
+++ b/sw/device/silicon_creator/lib/base/sec_mmio_unittest.cc
@@ -122,14 +122,6 @@
   EXPECT_EQ(ctx_->last_index, 2);
 }
 
-TEST_F(SecMmioTest, CounterInc) {
-  sec_mmio_write_increment(5);
-  EXPECT_EQ(ctx_->expected_write_count, 5);
-
-  sec_mmio_write_increment(10);
-  EXPECT_EQ(ctx_->expected_write_count, 15);
-}
-
 TEST_F(SecMmioTest, CheckValues) {
   EXPECT_ABS_WRITE32(0, 0x12345678);
   EXPECT_ABS_READ32(0, 0x12345678);
@@ -174,7 +166,7 @@
   EXPECT_ABS_WRITE32(0, 0x12345678);
   EXPECT_ABS_READ32(0, 0x12345678);
   sec_mmio_write32(0, 0x12345678);
-  sec_mmio_write_increment(1);
+  SEC_MMIO_WRITE_INCREMENT(1);
 
   sec_mmio_check_counters(/*expected_check_count=*/0);
   sec_mmio_check_counters(/*expected_check_count=*/1);
diff --git a/sw/device/silicon_creator/mask_rom/mask_rom.c b/sw/device/silicon_creator/mask_rom/mask_rom.c
index 59bf4ce..394760a 100644
--- a/sw/device/silicon_creator/mask_rom/mask_rom.c
+++ b/sw/device/silicon_creator/mask_rom/mask_rom.c
@@ -169,7 +169,7 @@
   HARDENED_RETURN_IF_ERROR(keymgr_state_check(kKeymgrStateReset));
   keymgr_sw_binding_set(&manifest->binding_value, &manifest->binding_value);
   keymgr_creator_max_ver_set(manifest->max_key_version);
-  SEC_MMIO_WRITE_INCREMENT(kKeymgrSecMmioInit + kKeymgrSecMmioSwBindingSet +
+  SEC_MMIO_WRITE_INCREMENT(kKeymgrSecMmioSwBindingSet +
                            kKeymgrSecMmioCreatorMaxVerSet);
 
   // Check cached life cycle state against the value reported by hardware.