commit cbc9026b7edd8414fd54c95968094ffc284e3fc9
author Greg Chadwick <gac@lowrisc.org> Thu Dec 02 16:24:29 2021 +0000
committer Greg Chadwick <mail@gregchadwick.co.uk> Mon Dec 06 13:27:37 2021 +0000
tree 1900a097fe28f9c1e1ec0948515d8b6aaa6e72c3
parent 5d6fe55ec455d52e33c0fd1a6269d23fbeaf9be4

[otbn, rtl] Wire up register integrity violation alert

Signed-off-by: Greg Chadwick <gac@lowrisc.org>

hw/ip/otbn/rtl/otbn.sv

diff --git a/hw/ip/otbn/rtl/otbn.sv b/hw/ip/otbn/rtl/otbn.sv
index e50accf..fcb2bc7 100644
--- a/hw/ip/otbn/rtl/otbn.sv
+++ b/hw/ip/otbn/rtl/otbn.sv
@@ -97,6 +97,7 @@
 
   err_bits_t err_bits;
   logic recoverable_err;
+  logic reg_intg_violation;
 
   logic software_errs_fatal_q, software_errs_fatal_d;
 
@@ -647,9 +648,8 @@
   assign hw2reg.fatal_alert_cause.imem_intg_violation.d  = insn_fetch_err;
   assign hw2reg.fatal_alert_cause.dmem_intg_violation.de = dmem_rerror;
   assign hw2reg.fatal_alert_cause.dmem_intg_violation.d  = dmem_rerror;
-  // TODO: Register file errors
-  assign hw2reg.fatal_alert_cause.reg_intg_violation.de = 0;
-  assign hw2reg.fatal_alert_cause.reg_intg_violation.d  = 0;
+  assign hw2reg.fatal_alert_cause.reg_intg_violation.de = reg_intg_violation;
+  assign hw2reg.fatal_alert_cause.reg_intg_violation.d  = reg_intg_violation;
   assign hw2reg.fatal_alert_cause.bus_intg_violation.de = bus_intg_violation;
   assign hw2reg.fatal_alert_cause.bus_intg_violation.d  = bus_intg_violation;
   assign hw2reg.fatal_alert_cause.bad_internal_state.de = 0;
@@ -858,6 +858,7 @@
 
       .err_bits_o                  (err_bits_rtl),
       .recoverable_err_o           (recoverable_err_rtl),
+      .reg_intg_violation_o        (reg_intg_violation),
 
       .imem_req_o                  (imem_req_core),
       .imem_addr_o                 (imem_addr_core),
@@ -911,6 +912,7 @@
 
       .err_bits_o                  (err_bits),
       .recoverable_err_o           (recoverable_err),
+      .reg_intg_violation_o        (reg_intg_violation),
 
       .imem_req_o                  (imem_req_core),
       .imem_addr_o                 (imem_addr_core),

hw/ip/otbn/rtl/otbn_controller.sv

diff --git a/hw/ip/otbn/rtl/otbn_controller.sv b/hw/ip/otbn/rtl/otbn_controller.sv
index 2e8f151..ad80403 100644
--- a/hw/ip/otbn/rtl/otbn_controller.sv
+++ b/hw/ip/otbn/rtl/otbn_controller.sv
@@ -28,6 +28,7 @@
 
   output err_bits_t err_bits_o, // valid when done_o is asserted
   output logic      recoverable_err_o,
+  output logic      reg_intg_violation_o,
 
   // Next instruction selection (to instruction fetch)
   output logic                     insn_fetch_req_valid_o,
@@ -462,6 +463,8 @@
 
   assign recoverable_err = software_err & ~software_errs_fatal_i;
 
+  assign reg_intg_violation_o = err_bits.reg_intg_violation;
+
   if (SecWipeEn) begin: gen_sec_wipe
     err_bits_t err_bits_d, err_bits_q;
     logic      recoverable_err_d, recoverable_err_q;

hw/ip/otbn/rtl/otbn_core.sv

diff --git a/hw/ip/otbn/rtl/otbn_core.sv b/hw/ip/otbn/rtl/otbn_core.sv
index 7056216..b9a1a84 100644
--- a/hw/ip/otbn/rtl/otbn_core.sv
+++ b/hw/ip/otbn/rtl/otbn_core.sv
@@ -37,6 +37,7 @@
 
   output err_bits_t err_bits_o, // valid when done_o is asserted
   output logic  recoverable_err_o,
+  output logic  reg_intg_violation_o,
 
   // Instruction memory (IMEM)
   output logic                     imem_req_o,
@@ -318,6 +319,7 @@
 
     .err_bits_o,
     .recoverable_err_o,
+    .reg_intg_violation_o,
 
     // Next instruction selection (to instruction fetch)
     .insn_fetch_req_addr_o   (insn_fetch_req_addr),