[dv/lc_ctrl] remove mem and intr related testplan
This commit removes mem and intr related testplan and sim_cfg.hjson
files because lc_ctrl does not contain memory or interrupts.
Signed-off-by: Cindy Chen <chencindy@google.com>
diff --git a/hw/ip/lc_ctrl/data/lc_ctrl_testplan.hjson b/hw/ip/lc_ctrl/data/lc_ctrl_testplan.hjson
index a21f50d..abec17e 100644
--- a/hw/ip/lc_ctrl/data/lc_ctrl_testplan.hjson
+++ b/hw/ip/lc_ctrl/data/lc_ctrl_testplan.hjson
@@ -4,8 +4,7 @@
{
name: "lc_ctrl"
import_testplans: ["hw/dv/tools/dvsim/testplans/csr_testplan.hjson",
- "hw/dv/tools/dvsim/testplans/mem_testplan.hjson",
- "hw/dv/tools/dvsim/testplans/intr_test_testplan.hjson",
+ "hw/dv/tools/dvsim/testplans/alert_test_testplan.hjson",
"hw/dv/tools/dvsim/testplans/tl_device_access_types_testplan.hjson"]
entries: [
{
diff --git a/hw/ip/lc_ctrl/dv/lc_ctrl_sim_cfg.hjson b/hw/ip/lc_ctrl/dv/lc_ctrl_sim_cfg.hjson
index 0d5f445..d97aa54 100644
--- a/hw/ip/lc_ctrl/dv/lc_ctrl_sim_cfg.hjson
+++ b/hw/ip/lc_ctrl/dv/lc_ctrl_sim_cfg.hjson
@@ -29,7 +29,6 @@
"{proj_root}/hw/dv/tools/dvsim/common_sim_cfg.hjson",
// Common CIP test lists
"{proj_root}/hw/dv/tools/dvsim/tests/csr_tests.hjson",
- "{proj_root}/hw/dv/tools/dvsim/tests/intr_test.hjson",
"{proj_root}/hw/dv/tools/dvsim/tests/alert_test.hjson",
"{proj_root}/hw/dv/tools/dvsim/tests/tl_access_tests.hjson"]
// TODO: temp commented out stress_test
