commit | c8ea251bc0ca31c452d18ea4659719293f2a7ac1 | [log] [tgz] |
---|---|---|
author | Timothy Chen <timothytim@google.com> | Tue Aug 11 10:39:40 2020 -0700 |
committer | tjaychen <timothytim@google.com> | Tue Aug 11 13:07:49 2020 -0700 |
tree | ab72ae8982539676b818fe0718ed01e431248800 | |
parent | dde680585dd0434fc542c163a58caddee0e74f35 [diff] |
[ast] ast changes to enable top_earlgrey - speed up always on clock and use it as the sole clock that drives the system as top_earlgrey is not yet ready for async clocks Signed-off-by: Timothy Chen <timothytim@google.com> [ast] various veriblelint fixes Signed-off-by: Timothy Chen <timothytim@google.com> [ast] verible-lint fixes Signed-off-by: Timothy Chen <timothytim@google.com>
OpenTitan is an open source silicon Root of Trust (RoT) project. OpenTitan will make the silicon RoT design and implementation more transparent, trustworthy, and secure for enterprises, platform providers, and chip manufacturers. OpenTitan is administered by lowRISC CIC as a collaborative project to produce high quality, open IP for instantiation as a full-featured product. See the OpenTitan site and OpenTitan docs for more information about the project.
This repository contains hardware, software and utilities written as part of the OpenTitan project. It is structured as monolithic repository, or “monorepo”, where all components live in one repository. It exists to enable collaboration across partners participating in the OpenTitan project.
The project contains comprehensive documentation of all IPs and tools. You can access it online at docs.opentitan.org.
Have a look at CONTRIBUTING for guidelines on how to contribute code to this repository.
Unless otherwise noted, everything in this repository is covered by the Apache License, Version 2.0 (see LICENSE for full text).