[sw,tests] Test the wake from sleep using the ADC ctrl for debug cable wakeup
For test: chip_sw_adc_ctrl_sleep_debug_cable_wakeup.
Configures the ADC_CTRL and filters then enters deep sleep. Checks that generated stimulus within the
filters' configured ranges provides a wakeup signal and the system reboots. After reboot checks the
wakeup reason and the triggered values in the ADC_CTRL.
Signed-off-by: Dave Williams <dave.williams@ensilica.com>
diff --git a/hw/top_earlgrey/data/chip_testplan.hjson b/hw/top_earlgrey/data/chip_testplan.hjson
index 22240df..546a777 100644
--- a/hw/top_earlgrey/data/chip_testplan.hjson
+++ b/hw/top_earlgrey/data/chip_testplan.hjson
@@ -1548,7 +1548,7 @@
- Repeat for both ADC channels.
'''
milestone: V2
- tests: []
+ tests: ["chip_sw_adc_ctrl_sleep_debug_cable_wakeup"]
}
///////////////////////////////////////////////////////
diff --git a/hw/top_earlgrey/dv/chip_sim_cfg.hjson b/hw/top_earlgrey/dv/chip_sim_cfg.hjson
index ef009b1..26ee36d 100644
--- a/hw/top_earlgrey/dv/chip_sim_cfg.hjson
+++ b/hw/top_earlgrey/dv/chip_sim_cfg.hjson
@@ -495,6 +495,13 @@
run_opts: ["+sw_test_timeout_ns=18000000"]
}
{
+ name: chip_sw_adc_ctrl_sleep_debug_cable_wakeup
+ uvm_test_seq: chip_sw_adc_ctrl_sleep_debug_cable_wakeup_vseq
+ sw_images: ["sw/device/tests/adc_ctrl_sleep_debug_cable_wakeup_test:1"]
+ en_run_modes: ["sw_test_mode_test_rom"]
+ run_opts: ["+sw_test_timeout_ns=18000000"]
+ }
+ {
name: chip_sw_otbn_randomness
uvm_test_seq: chip_sw_base_vseq
sw_images: ["sw/device/tests/otbn_randomness_test:1"]
diff --git a/hw/top_earlgrey/dv/env/chip_env.core b/hw/top_earlgrey/dv/env/chip_env.core
index f1ee576..1709d5a 100644
--- a/hw/top_earlgrey/dv/env/chip_env.core
+++ b/hw/top_earlgrey/dv/env/chip_env.core
@@ -59,6 +59,7 @@
- seq_lib/chip_sw_ast_clk_outputs_vseq.sv: {is_include_file: true}
- seq_lib/chip_sw_sensor_ctrl_status_intr_vseq.sv: {is_include_file: true}
- seq_lib/chip_sw_pwrmgr_deep_sleep_all_wake_ups_vseq.sv: {is_include_file: true}
+ - seq_lib/chip_sw_adc_ctrl_sleep_debug_cable_wakeup_vseq.sv: {is_include_file: true}
- seq_lib/chip_callback_vseq.sv: {is_include_file: true}
- autogen/chip_env_pkg__params.sv: {is_include_file: true}
- ast_supply_if.sv
diff --git a/hw/top_earlgrey/dv/env/seq_lib/chip_sw_adc_ctrl_sleep_debug_cable_wakeup_vseq.sv b/hw/top_earlgrey/dv/env/seq_lib/chip_sw_adc_ctrl_sleep_debug_cable_wakeup_vseq.sv
new file mode 100644
index 0000000..29cc2a1
--- /dev/null
+++ b/hw/top_earlgrey/dv/env/seq_lib/chip_sw_adc_ctrl_sleep_debug_cable_wakeup_vseq.sv
@@ -0,0 +1,198 @@
+// Copyright lowRISC contributors.
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+class chip_sw_adc_ctrl_sleep_debug_cable_wakeup_vseq extends chip_sw_base_vseq;
+ `uvm_object_utils(chip_sw_adc_ctrl_sleep_debug_cable_wakeup_vseq)
+
+ `uvm_object_new
+
+ localparam string ADC_CHANNEL0_HDL_PATH = "tb.dut.u_ast.u_adc.u_adc_ana.adc_d_ch0_o";
+ localparam string ADC_CHANNEL1_HDL_PATH = "tb.dut.u_ast.u_adc.u_adc_ana.adc_d_ch1_o";
+ localparam string ADC_DATA_VALID = "tb.dut.u_ast.u_adc.adc_d_val_o";
+ localparam string ADC_POWERDOWN = "tb.dut.u_ast.u_adc.adc_pd_i";
+ localparam string ADC_CTRL_WAKEUP_REQ = "tb.dut.top_earlgrey.u_pwrmgr_aon.wakeups_i[1]";
+
+ localparam uint NUM_LOW_POWER_SAMPLES = 8;
+ localparam uint NUM_NORMAL_POWER_SAMPLES = 8;
+ localparam uint WAKE_UP_TIME_AON_CYCLES = 16;
+ localparam uint CHANNEL0_MIN = 128;
+ localparam uint CHANNEL0_MAX = CHANNEL0_MIN + 127;
+ localparam uint CHANNEL1_MIN = 512;
+ localparam uint CHANNEL1_MAX = CHANNEL1_MIN + 127;
+
+ localparam bit IN_RANGE = 1;
+ localparam bit NOT_IN_RANGE = 0;
+
+ event adc_valid_falling_edge_event;
+ bit powerdown_count_enabled;
+ int powerdown_count;
+
+ virtual task check_hdl_paths();
+ int retval;
+ retval = uvm_hdl_check_path(ADC_CHANNEL0_HDL_PATH);
+ `DV_CHECK_EQ_FATAL(retval, 1, $sformatf(
+ "Hierarchical path %0s appears to be invalid.", ADC_CHANNEL0_HDL_PATH))
+ retval = uvm_hdl_check_path(ADC_CHANNEL1_HDL_PATH);
+ `DV_CHECK_EQ_FATAL(retval, 1, $sformatf(
+ "Hierarchical path %0s appears to be invalid.", ADC_CHANNEL1_HDL_PATH))
+ retval = uvm_hdl_check_path(ADC_DATA_VALID);
+ `DV_CHECK_EQ_FATAL(retval, 1, $sformatf(
+ "Hierarchical path %0s appears to be invalid.", ADC_DATA_VALID))
+ retval = uvm_hdl_check_path(ADC_POWERDOWN);
+ `DV_CHECK_EQ_FATAL(retval, 1, $sformatf(
+ "Hierarchical path %0s appears to be invalid.", ADC_POWERDOWN))
+ retval = uvm_hdl_check_path(ADC_CTRL_WAKEUP_REQ);
+ `DV_CHECK_EQ_FATAL(retval, 1, $sformatf(
+ "Hierarchical path %0s appears to be invalid.", ADC_CTRL_WAKEUP_REQ))
+ endtask
+
+ virtual task symbol_byte_write(string str, bit [7:0] data);
+ bit [7:0] array_data[1] = {data};
+ sw_symbol_backdoor_overwrite(str, array_data);
+ endtask
+
+ virtual task cpu_init();
+ // sw_symbol_backdoor_overwrite takes an array as the input.
+ super.cpu_init();
+ symbol_byte_write("kNumLowPowerSamples", NUM_LOW_POWER_SAMPLES);
+ symbol_byte_write("kNumNormalPowerSamples", NUM_NORMAL_POWER_SAMPLES);
+ symbol_byte_write("kWakeUpTimeAonCycles", WAKE_UP_TIME_AON_CYCLES);
+ symbol_byte_write("kChannel0MaxLowByte", CHANNEL0_MAX[7:0]);
+ symbol_byte_write("kChannel0MaxHighByte", CHANNEL0_MAX[15:8]);
+ symbol_byte_write("kChannel0MinLowByte", CHANNEL0_MIN[7:0]);
+ symbol_byte_write("kChannel0MinHighByte", CHANNEL0_MIN[15:8]);
+ symbol_byte_write("kChannel1MaxLowByte", CHANNEL1_MAX[7:0]);
+ symbol_byte_write("kChannel1MaxHighByte", CHANNEL1_MAX[15:8]);
+ symbol_byte_write("kChannel1MinLowByte", CHANNEL1_MIN[7:0]);
+ symbol_byte_write("kChannel1MinHighByte", CHANNEL1_MIN[15:8]);
+ endtask
+
+ virtual task wait_for_adc_valid_falling_edge();
+ int retval;
+ bit adc_data_valid;
+ bit adc_data_valid_last_value;
+ forever begin
+ adc_data_valid_last_value = adc_data_valid;
+ retval = uvm_hdl_read(ADC_DATA_VALID, adc_data_valid);
+ `DV_CHECK_EQ(retval, 1, $sformatf("uvm_hdl_read failed for %0s", ADC_DATA_VALID))
+ if (adc_data_valid_last_value == 1 && adc_data_valid == 0) begin
+ ->adc_valid_falling_edge_event;
+ end
+ cfg.clk_rst_vif.wait_clks(1);
+ end
+ endtask
+
+ virtual task detect_powerdown_rising_edge();
+ int retval;
+ bit powerdown_value;
+ bit powerdown_last_value;
+ forever begin
+ powerdown_last_value = powerdown_value;
+ retval = uvm_hdl_read(ADC_POWERDOWN, powerdown_value);
+ `DV_CHECK_EQ(retval, 1, $sformatf("uvm_hdl_read failed for %0s", ADC_POWERDOWN))
+ if (powerdown_value == 1 && powerdown_last_value == 0) begin
+ if (powerdown_count_enabled == 1) begin
+ powerdown_count++;
+ end
+ end
+ cfg.clk_rst_vif.wait_clks(1);
+ end
+ endtask
+
+ virtual task force_adc_channels(input bit channel0_in_range, input bit channel1_in_range);
+ bit [9:0] channel0_data;
+ bit [9:0] channel1_data;
+ if (channel0_in_range == 1) begin
+ `DV_CHECK(std::randomize(channel0_data) with {
+ channel0_data inside {[CHANNEL0_MIN : CHANNEL0_MAX]};});
+ end else begin
+ `DV_CHECK(std::randomize(channel0_data) with {
+ !{channel0_data inside {[CHANNEL0_MIN : CHANNEL0_MAX]}};});
+ end
+ `DV_CHECK(uvm_hdl_force(ADC_CHANNEL0_HDL_PATH, channel0_data));
+ if (channel1_in_range == 1) begin
+ `DV_CHECK(std::randomize(channel1_data) with {
+ channel1_data inside {[CHANNEL1_MIN : CHANNEL1_MAX]};});
+ end else begin
+ `DV_CHECK(std::randomize(channel1_data) with {
+ !{channel1_data inside {[CHANNEL1_MIN : CHANNEL1_MAX]}};});
+ end
+ `DV_CHECK(uvm_hdl_force(ADC_CHANNEL1_HDL_PATH, channel1_data));
+ endtask
+
+ virtual task generate_adc_data();
+ bit wakeup;
+ int bad_sample;
+
+ // Data with a channel 0 glitch.
+ bad_sample = $urandom_range(0, NUM_LOW_POWER_SAMPLES - 1);
+ for (int i = 0; i < NUM_LOW_POWER_SAMPLES; i++) begin
+ if (i == bad_sample) begin
+ force_adc_channels(NOT_IN_RANGE, IN_RANGE);
+ end else begin
+ force_adc_channels(IN_RANGE, IN_RANGE);
+ end
+ repeat (2) @(adc_valid_falling_edge_event);
+ end
+
+ // Both channels glitched.
+ force_adc_channels(NOT_IN_RANGE, NOT_IN_RANGE);
+ repeat (2) @(adc_valid_falling_edge_event);
+
+ // Data with a channel 1 glitch.
+ bad_sample = $urandom_range(0, NUM_LOW_POWER_SAMPLES - 1);
+ for (int i = 0; i < NUM_LOW_POWER_SAMPLES; i++) begin
+ if (i == bad_sample) begin
+ force_adc_channels(IN_RANGE, NOT_IN_RANGE);
+ end else begin
+ force_adc_channels(IN_RANGE, IN_RANGE);
+ end
+ repeat (2) @(adc_valid_falling_edge_event);
+ end
+
+ // Both channels glitched.
+ force_adc_channels(NOT_IN_RANGE, NOT_IN_RANGE);
+ repeat (NUM_NORMAL_POWER_SAMPLES * 2) @(adc_valid_falling_edge_event);
+
+ // Check that there is no unexpected wakeup and that there
+ // has been a number of powerdown signals following the glitched data.
+ `DV_CHECK(uvm_hdl_read(ADC_CTRL_WAKEUP_REQ, wakeup));
+ `DV_CHECK_EQ_FATAL(wakeup, 0, "Unexpected wakeup.")
+ `DV_CHECK(powerdown_count >= NUM_LOW_POWER_SAMPLES * 3);
+
+ // Data with both channels in range which will trigger a wakeup.
+ for (int i = 0; i < NUM_LOW_POWER_SAMPLES; i++) begin
+ force_adc_channels(IN_RANGE, IN_RANGE);
+ repeat (2) @(adc_valid_falling_edge_event);
+ end
+ for (int i = 0; i < NUM_NORMAL_POWER_SAMPLES; i++) begin
+ force_adc_channels(IN_RANGE, IN_RANGE);
+ repeat (2) @(adc_valid_falling_edge_event);
+ end
+ endtask
+
+ virtual task body();
+ check_hdl_paths();
+ super.body();
+
+ // Wait for test to enter WFI before generating ADC data which will
+ // cause a wakeup event.
+ wait(cfg.sw_test_status_vif.sw_test_status == SwTestStatusInTest);
+ wait(cfg.sw_test_status_vif.sw_test_status == SwTestStatusInWfi);
+
+ // Fork tasks for detecting edges.
+ powerdown_count = 0;
+ powerdown_count_enabled = 1;
+ fork
+ wait_for_adc_valid_falling_edge();
+ detect_powerdown_rising_edge();
+ join_none
+
+ // Generate a sequence of ADC data.
+ generate_adc_data();
+
+ disable fork;
+ endtask
+
+endclass
diff --git a/hw/top_earlgrey/dv/env/seq_lib/chip_vseq_list.sv b/hw/top_earlgrey/dv/env/seq_lib/chip_vseq_list.sv
index 15b3a92..6de71fa 100644
--- a/hw/top_earlgrey/dv/env/seq_lib/chip_vseq_list.sv
+++ b/hw/top_earlgrey/dv/env/seq_lib/chip_vseq_list.sv
@@ -28,3 +28,4 @@
`include "chip_sw_ast_clk_outputs_vseq.sv"
`include "chip_sw_sensor_ctrl_status_intr_vseq.sv"
`include "chip_sw_pwrmgr_deep_sleep_all_wake_ups_vseq.sv"
+`include "chip_sw_adc_ctrl_sleep_debug_cable_wakeup_vseq.sv"
diff --git a/sw/device/tests/sim_dv/BUILD b/sw/device/tests/sim_dv/BUILD
index 6a1ed1e..407312e 100644
--- a/sw/device/tests/sim_dv/BUILD
+++ b/sw/device/tests/sim_dv/BUILD
@@ -293,3 +293,21 @@
"//sw/device/lib/testing/test_framework:ottf_main",
],
)
+
+opentitan_functest(
+ name = "adc_ctrl_sleep_debug_cable_wakeup_test",
+ srcs = ["adc_ctrl_sleep_debug_cable_wakeup_test.c"],
+ targets = ["dv"],
+ deps = [
+ "//hw/top_earlgrey/sw/autogen:top_earlgrey",
+ "//sw/device/lib/base:mmio",
+ "//sw/device/lib/dif:adc_ctrl",
+ "//sw/device/lib/dif:pwrmgr",
+ "//sw/device/lib/dif:rstmgr",
+ "//sw/device/lib/runtime:log",
+ "//sw/device/lib/testing:pwrmgr_testutils",
+ "//sw/device/lib/testing:rstmgr_testutils",
+ "//sw/device/lib/testing/test_framework:check",
+ "//sw/device/lib/testing/test_framework:ottf_main",
+ ],
+)
diff --git a/sw/device/tests/sim_dv/adc_ctrl_sleep_debug_cable_wakeup_test.c b/sw/device/tests/sim_dv/adc_ctrl_sleep_debug_cable_wakeup_test.c
new file mode 100644
index 0000000..dd040e9
--- /dev/null
+++ b/sw/device/tests/sim_dv/adc_ctrl_sleep_debug_cable_wakeup_test.c
@@ -0,0 +1,142 @@
+// Copyright lowRISC contributors.
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include "sw/device/lib/base/mmio.h"
+#include "sw/device/lib/dif/dif_adc_ctrl.h"
+#include "sw/device/lib/dif/dif_pwrmgr.h"
+#include "sw/device/lib/dif/dif_rstmgr.h"
+#include "sw/device/lib/runtime/log.h"
+#include "sw/device/lib/testing/pwrmgr_testutils.h"
+#include "sw/device/lib/testing/rstmgr_testutils.h"
+#include "sw/device/lib/testing/test_framework/check.h"
+#include "sw/device/lib/testing/test_framework/ottf_main.h"
+
+#include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"
+
+const test_config_t kTestConfig;
+
+enum {
+ kPowerUpTimeAonCycles = 2,
+};
+
+// These constants will be setup from the testbench
+// using sw_symbol_backdoor_overwrite.
+
+static volatile const uint8_t kNumLowPowerSamples;
+static volatile const uint8_t kNumNormalPowerSamples;
+static volatile const uint8_t kWakeUpTimeAonCycles;
+
+static volatile const uint8_t kChannel0MaxLowByte;
+static volatile const uint8_t kChannel0MaxHighByte;
+static volatile const uint8_t kChannel0MinLowByte;
+static volatile const uint8_t kChannel0MinHighByte;
+
+static volatile const uint8_t kChannel1MaxLowByte;
+static volatile const uint8_t kChannel1MaxHighByte;
+static volatile const uint8_t kChannel1MinLowByte;
+static volatile const uint8_t kChannel1MinHighByte;
+
+static void configure_adc_ctrl(const dif_adc_ctrl_t *adc_ctrl) {
+ CHECK_DIF_OK(dif_adc_ctrl_set_enabled(adc_ctrl, kDifToggleDisabled));
+ CHECK_DIF_OK(dif_adc_ctrl_reset(adc_ctrl));
+ CHECK_DIF_OK(dif_adc_ctrl_configure(
+ adc_ctrl, (dif_adc_ctrl_config_t){
+ .mode = kDifAdcCtrlLowPowerScanMode,
+ .num_low_power_samples = kNumLowPowerSamples,
+ .num_normal_power_samples = kNumNormalPowerSamples,
+ .power_up_time_aon_cycles = kPowerUpTimeAonCycles,
+ .wake_up_time_aon_cycles = kWakeUpTimeAonCycles}));
+}
+
+bool test_main(void) {
+ dif_adc_ctrl_t adc_ctrl;
+ dif_pwrmgr_t pwrmgr;
+ dif_rstmgr_t rstmgr;
+
+ CHECK_DIF_OK(dif_adc_ctrl_init(
+ mmio_region_from_addr(TOP_EARLGREY_ADC_CTRL_AON_BASE_ADDR), &adc_ctrl));
+ CHECK_DIF_OK(dif_pwrmgr_init(
+ mmio_region_from_addr(TOP_EARLGREY_PWRMGR_AON_BASE_ADDR), &pwrmgr));
+ CHECK_DIF_OK(dif_rstmgr_init(
+ mmio_region_from_addr(TOP_EARLGREY_RSTMGR_AON_BASE_ADDR), &rstmgr));
+
+ uint16_t channel0_filter0_max =
+ (kChannel0MaxHighByte << 8) | kChannel0MaxLowByte;
+ uint16_t channel0_filter0_min =
+ (kChannel0MinHighByte << 8) | kChannel0MinLowByte;
+ uint16_t channel1_filter0_max =
+ (kChannel1MaxHighByte << 8) | kChannel1MaxLowByte;
+ uint16_t channel1_filter0_min =
+ (kChannel1MinHighByte << 8) | kChannel1MinLowByte;
+
+ // Assuming the chip hasn't slept yet, wakeup reason should be empty.
+ if (pwrmgr_testutils_is_wakeup_reason(&pwrmgr, 0)) {
+ LOG_INFO("POR reset.");
+
+ CHECK(rstmgr_testutils_is_reset_info(&rstmgr, kDifRstmgrResetInfoPor));
+
+ // Setup ADC configuration.
+ configure_adc_ctrl(&adc_ctrl);
+
+ // Setup ADC filters. There is one filter for each channel.
+ CHECK_DIF_OK(dif_adc_ctrl_configure_filter(
+ &adc_ctrl, kDifAdcCtrlChannel0,
+ (dif_adc_ctrl_filter_config_t){.filter = kDifAdcCtrlFilter0,
+ .generate_irq_on_match = false,
+ .generate_wakeup_on_match = true,
+ .in_range = true,
+ .max_voltage = channel0_filter0_max,
+ .min_voltage = channel0_filter0_min},
+ kDifToggleDisabled));
+ CHECK_DIF_OK(dif_adc_ctrl_configure_filter(
+ &adc_ctrl, kDifAdcCtrlChannel1,
+ (dif_adc_ctrl_filter_config_t){.filter = kDifAdcCtrlFilter0,
+ .generate_irq_on_match = false,
+ .generate_wakeup_on_match = true,
+ .in_range = true,
+ .max_voltage = channel1_filter0_max,
+ .min_voltage = channel1_filter0_min},
+ kDifToggleDisabled));
+
+ // enable filters.
+ CHECK_DIF_OK(dif_adc_ctrl_filter_set_enabled(
+ &adc_ctrl, kDifAdcCtrlChannel0, kDifAdcCtrlFilter0, kDifToggleEnabled));
+ CHECK_DIF_OK(dif_adc_ctrl_filter_set_enabled(
+ &adc_ctrl, kDifAdcCtrlChannel1, kDifAdcCtrlFilter0, kDifToggleEnabled));
+
+ CHECK_DIF_OK(dif_adc_ctrl_set_enabled(&adc_ctrl, kDifToggleEnabled));
+
+ // Setup low power.
+ rstmgr_testutils_pre_reset(&rstmgr);
+ pwrmgr_testutils_enable_low_power(&pwrmgr, kDifPwrmgrWakeupRequestSourceTwo,
+ 0);
+ // Enter low power mode.
+ LOG_INFO("Issued WFI to enter sleep.");
+ test_status_set(kTestStatusInWfi);
+ wait_for_interrupt();
+ } else if (pwrmgr_testutils_is_wakeup_reason(
+ &pwrmgr, kDifPwrmgrWakeupRequestSourceTwo)) {
+ LOG_INFO("Wakeup reset.");
+ CHECK(rstmgr_testutils_is_reset_info(&rstmgr,
+ kDifRstmgrResetInfoLowPowerExit));
+ uint16_t adc_value;
+ CHECK_DIF_OK(dif_adc_ctrl_get_triggered_value(
+ &adc_ctrl, kDifAdcCtrlChannel0, &adc_value));
+ CHECK(channel0_filter0_min <= adc_value &&
+ adc_value <= channel0_filter0_max);
+
+ CHECK_DIF_OK(dif_adc_ctrl_get_triggered_value(
+ &adc_ctrl, kDifAdcCtrlChannel1, &adc_value));
+ CHECK(channel1_filter0_min <= adc_value &&
+ adc_value <= channel1_filter0_max);
+
+ } else {
+ dif_pwrmgr_wakeup_reason_t wakeup_reason;
+ CHECK_DIF_OK(dif_pwrmgr_wakeup_reason_get(&pwrmgr, &wakeup_reason));
+ LOG_ERROR("Unexpected wakeup detected: type = %d, request_source = %d",
+ wakeup_reason.types, wakeup_reason.request_sources);
+ return false;
+ }
+ return true;
+}
diff --git a/sw/device/tests/sim_dv/meson.build b/sw/device/tests/sim_dv/meson.build
index 231146d..a1cc74f 100644
--- a/sw/device/tests/sim_dv/meson.build
+++ b/sw/device/tests/sim_dv/meson.build
@@ -385,3 +385,25 @@
'library': sram_ctrl_main_scrambled_access_test_lib,
}
}
+
+adc_ctrl_sleep_debug_cable_wakeup_test_lib = declare_dependency(
+ link_with: static_library(
+ 'adc_ctrl_sleep_debug_cable_wakeup_test_lib',
+ sources: ['adc_ctrl_sleep_debug_cable_wakeup_test.c'],
+ dependencies: [
+ sw_lib_dif_adc_ctrl,
+ sw_lib_dif_pwrmgr,
+ sw_lib_dif_rstmgr,
+ sw_lib_mmio,
+ sw_lib_runtime_log,
+ sw_lib_testing_pwrmgr_testutils,
+ sw_lib_testing_rstmgr_testutils,
+ top_earlgrey,
+ ],
+ ),
+)
+sw_tests += {
+ 'adc_ctrl_sleep_debug_cable_wakeup_test': {
+ 'library': adc_ctrl_sleep_debug_cable_wakeup_test_lib,
+ }
+}
