commit c858b582d5aaa604afa2548ae0016adc321fc9c5
author Martin Lueker-Boden <martin.lueker-boden@wdc.com> Sat Oct 23 01:35:25 2021 -0700
committer Martin Lueker-Boden <47870387+martin-lueker@users.noreply.github.com> Tue Oct 26 15:55:33 2021 -0700
tree 220eae4acf5ab6f397a496447323ddd62dad1783
parent ea5626c41e7a69472184de5379dd8faa56bfbaa7

[ spi_host, rtl ] AUTOGEN

Signed-off-by: Martin Lueker-Boden <martin.lueker-boden@wdc.com>

hw/ip/spi_host/rtl/spi_host_reg_pkg.sv

diff --git a/hw/ip/spi_host/rtl/spi_host_reg_pkg.sv b/hw/ip/spi_host/rtl/spi_host_reg_pkg.sv
index 384f5e2..95334bc 100644
--- a/hw/ip/spi_host/rtl/spi_host_reg_pkg.sv
+++ b/hw/ip/spi_host/rtl/spi_host_reg_pkg.sv
@@ -304,6 +304,11 @@
   parameter logic [0:0] SPI_HOST_INTR_TEST_SPI_EVENT_RESVAL = 1'h 0;
   parameter logic [0:0] SPI_HOST_ALERT_TEST_RESVAL = 1'h 0;
   parameter logic [0:0] SPI_HOST_ALERT_TEST_FATAL_FAULT_RESVAL = 1'h 0;
+  parameter logic [13:0] SPI_HOST_COMMAND_RESVAL = 14'h 0;
+  parameter logic [8:0] SPI_HOST_COMMAND_LEN_RESVAL = 9'h 0;
+  parameter logic [0:0] SPI_HOST_COMMAND_CSAAT_RESVAL = 1'h 0;
+  parameter logic [1:0] SPI_HOST_COMMAND_SPEED_RESVAL = 2'h 0;
+  parameter logic [1:0] SPI_HOST_COMMAND_DIRECTION_RESVAL = 2'h 0;
 
   // Window parameters
   parameter logic [BlockAw-1:0] SPI_HOST_DATA_OFFSET = 6'h 24;

hw/ip/spi_host/rtl/spi_host_reg_top.sv

diff --git a/hw/ip/spi_host/rtl/spi_host_reg_top.sv b/hw/ip/spi_host/rtl/spi_host_reg_top.sv
index d399211..26df29a 100644
--- a/hw/ip/spi_host/rtl/spi_host_reg_top.sv
+++ b/hw/ip/spi_host/rtl/spi_host_reg_top.sv
@@ -212,13 +212,9 @@
   logic [31:0] csid_qs;
   logic [31:0] csid_wd;
   logic command_we;
-  logic [8:0] command_len_qs;
   logic [8:0] command_len_wd;
-  logic command_csaat_qs;
   logic command_csaat_wd;
-  logic [1:0] command_speed_qs;
   logic [1:0] command_speed_wd;
-  logic [1:0] command_direction_qs;
   logic [1:0] command_direction_wd;
   logic error_enable_we;
   logic error_enable_cmdbusy_qs;
@@ -1039,105 +1035,61 @@
   );
 
 
-  // R[command]: V(False)
+  // R[command]: V(True)
   //   F[len]: 8:0
-  prim_subreg #(
-    .DW      (9),
-    .SwAccess(prim_subreg_pkg::SwAccessRW),
-    .RESVAL  (9'h0)
+  prim_subreg_ext #(
+    .DW    (9)
   ) u_command_len (
-    .clk_i   (clk_i),
-    .rst_ni  (rst_ni),
-
-    // from register interface
+    .re     (1'b0),
     .we     (command_we),
     .wd     (command_len_wd),
-
-    // from internal hardware
-    .de     (1'b0),
     .d      ('0),
-
-    // to internal hardware
+    .qre    (),
     .qe     (reg2hw.command.len.qe),
     .q      (reg2hw.command.len.q),
-
-    // to register interface (read)
-    .qs     (command_len_qs)
+    .qs     ()
   );
 
   //   F[csaat]: 9:9
-  prim_subreg #(
-    .DW      (1),
-    .SwAccess(prim_subreg_pkg::SwAccessRW),
-    .RESVAL  (1'h0)
+  prim_subreg_ext #(
+    .DW    (1)
   ) u_command_csaat (
-    .clk_i   (clk_i),
-    .rst_ni  (rst_ni),
-
-    // from register interface
+    .re     (1'b0),
     .we     (command_we),
     .wd     (command_csaat_wd),
-
-    // from internal hardware
-    .de     (1'b0),
     .d      ('0),
-
-    // to internal hardware
+    .qre    (),
     .qe     (reg2hw.command.csaat.qe),
     .q      (reg2hw.command.csaat.q),
-
-    // to register interface (read)
-    .qs     (command_csaat_qs)
+    .qs     ()
   );
 
   //   F[speed]: 11:10
-  prim_subreg #(
-    .DW      (2),
-    .SwAccess(prim_subreg_pkg::SwAccessRW),
-    .RESVAL  (2'h0)
+  prim_subreg_ext #(
+    .DW    (2)
   ) u_command_speed (
-    .clk_i   (clk_i),
-    .rst_ni  (rst_ni),
-
-    // from register interface
+    .re     (1'b0),
     .we     (command_we),
     .wd     (command_speed_wd),
-
-    // from internal hardware
-    .de     (1'b0),
     .d      ('0),
-
-    // to internal hardware
+    .qre    (),
     .qe     (reg2hw.command.speed.qe),
     .q      (reg2hw.command.speed.q),
-
-    // to register interface (read)
-    .qs     (command_speed_qs)
+    .qs     ()
   );
 
   //   F[direction]: 13:12
-  prim_subreg #(
-    .DW      (2),
-    .SwAccess(prim_subreg_pkg::SwAccessRW),
-    .RESVAL  (2'h0)
+  prim_subreg_ext #(
+    .DW    (2)
   ) u_command_direction (
-    .clk_i   (clk_i),
-    .rst_ni  (rst_ni),
-
-    // from register interface
+    .re     (1'b0),
     .we     (command_we),
     .wd     (command_direction_wd),
-
-    // from internal hardware
-    .de     (1'b0),
     .d      ('0),
-
-    // to internal hardware
+    .qre    (),
     .qe     (reg2hw.command.direction.qe),
     .q      (reg2hw.command.direction.q),
-
-    // to register interface (read)
-    .qs     (command_direction_qs)
+    .qs     ()
   );
 
 
@@ -1734,10 +1686,10 @@
       end
 
       addr_hit[8]: begin
-        reg_rdata_next[8:0] = command_len_qs;
-        reg_rdata_next[9] = command_csaat_qs;
-        reg_rdata_next[11:10] = command_speed_qs;
-        reg_rdata_next[13:12] = command_direction_qs;
+        reg_rdata_next[8:0] = '0;
+        reg_rdata_next[9] = '0;
+        reg_rdata_next[11:10] = '0;
+        reg_rdata_next[13:12] = '0;
       end
 
       addr_hit[9]: begin