commit c76ff7c612e3facc4165e203cc1a957deb05f942
author Srikrishna Iyer <sriyer@google.com> Fri Sep 09 14:49:19 2022 -0700
committer Srikrishna Iyer <46467186+sriyerg@users.noreply.github.com> Sat Sep 10 01:38:32 2022 -0700
tree b0a378aa16baf3b8ab05d55ef8f6be36e751621f
parent 4450404880b733cfef8eab88a097c89380bc9a45

[sw, test_rom] Skip UART init for DV

The test ROM initializes UART for logging, which is not
required for DV.

Signed-off-by: Srikrishna Iyer <sriyer@google.com>

sw/device/lib/testing/test_rom/BUILD

diff --git a/sw/device/lib/testing/test_rom/BUILD b/sw/device/lib/testing/test_rom/BUILD
index 8f59bbd..349ff77 100644
--- a/sw/device/lib/testing/test_rom/BUILD
+++ b/sw/device/lib/testing/test_rom/BUILD
@@ -129,6 +129,7 @@
         "//hw/top_earlgrey/ip/clkmgr/data/autogen:clkmgr_regs",
         "//hw/top_earlgrey/ip/sensor_ctrl/data:sensor_ctrl_regs",
         "//hw/top_earlgrey/sw/autogen:top_earlgrey",
+        "//sw/device/lib/arch:device",
         "//sw/device/lib/base:mmio",
         "//sw/device/lib/crt",
         "//sw/device/lib/dif:clkmgr",

sw/device/lib/testing/test_rom/test_rom.c

diff --git a/sw/device/lib/testing/test_rom/test_rom.c b/sw/device/lib/testing/test_rom/test_rom.c
index f2e823e..e7e044e 100644
--- a/sw/device/lib/testing/test_rom/test_rom.c
+++ b/sw/device/lib/testing/test_rom/test_rom.c
@@ -77,16 +77,18 @@
       dif_flash_ctrl_set_flash_enablement(&flash_ctrl, kDifToggleEnabled));
 
   // Setup the UART for printing messages to the console.
-  CHECK_DIF_OK(dif_uart_init(
-      mmio_region_from_addr(TOP_EARLGREY_UART0_BASE_ADDR), &uart0));
-  CHECK_DIF_OK(
-      dif_uart_configure(&uart0, (dif_uart_config_t){
-                                     .baudrate = kUartBaudrate,
-                                     .clk_freq_hz = kClockFreqPeripheralHz,
-                                     .parity_enable = kDifToggleDisabled,
-                                     .parity = kDifUartParityEven,
-                                 }));
-  base_uart_stdout(&uart0);
+  if (kDeviceType != kDeviceSimDV) {
+    CHECK_DIF_OK(dif_uart_init(
+        mmio_region_from_addr(TOP_EARLGREY_UART0_BASE_ADDR), &uart0));
+    CHECK_DIF_OK(
+        dif_uart_configure(&uart0, (dif_uart_config_t){
+                                       .baudrate = kUartBaudrate,
+                                       .clk_freq_hz = kClockFreqPeripheralHz,
+                                       .parity_enable = kDifToggleDisabled,
+                                       .parity = kDifUartParityEven,
+                                   }));
+    base_uart_stdout(&uart0);
+  }
 
   // Print the chip version information
   LOG_INFO("%s", chip_info);