commit c57e55830a179a450e19b54255c052d8082e7aeb
author Timothy Chen <timothytim@google.com> Fri Jul 30 22:06:24 2021 -0700
committer tjaychen <timothytim@google.com> Mon Aug 02 10:24:44 2021 -0700
tree 71a040b40e87e95e79c431cb1c38360d5ad4cb63
parent a49ceb6a43ada04bdad52eb37654ee535dd745ad

[dv] update reg path for async registers

Signed-off-by: Timothy Chen <timothytim@google.com>

util/reggen/uvm_reg_base.sv.tpl

diff --git a/util/reggen/uvm_reg_base.sv.tpl b/util/reggen/uvm_reg_base.sv.tpl
index ca44646..4daf074 100644
--- a/util/reggen/uvm_reg_base.sv.tpl
+++ b/util/reggen/uvm_reg_base.sv.tpl
@@ -488,6 +488,9 @@
       reg_field_name = reg_name
     else:
       reg_field_name = reg_name + "_" + field.name.lower()
+
+    if reg.async_name and not reg.hwext:
+      reg_field_name += ".u_subreg"
 %>\
 %   if ((field.hwaccess.value[1] == HwAccess.NONE and\
        field.swaccess.swrd() == SwRdAccess.RD and\