[cw305] Break out all HW/SW straps and connect to SAM3X
Signed-off-by: Michael Schaffner <msf@google.com>
diff --git a/hw/top_englishbreakfast/data/pins_cw305.xdc b/hw/top_englishbreakfast/data/pins_cw305.xdc
index bec2081..a2b7eca 100644
--- a/hw/top_englishbreakfast/data/pins_cw305.xdc
+++ b/hw/top_englishbreakfast/data/pins_cw305.xdc
@@ -2,15 +2,15 @@
## Tested with a A100T FPGA configuration.
## Clock Signal
-set_property -dict { PACKAGE_PIN N13 IOSTANDARD LVCMOS33 } [get_ports { IO_CLK }]
+set_property -dict { PACKAGE_PIN N13 IOSTANDARD LVCMOS33 } [get_ports { IO_CLK }];
## Clock constraints
## set via clocks.xdc
## LEDs
-set_property -dict { PACKAGE_PIN T2 DRIVE 8 IOSTANDARD LVCMOS33 } [get_ports { IOA8 }]
-set_property -dict { PACKAGE_PIN T3 DRIVE 8 IOSTANDARD LVCMOS33 } [get_ports { IOB0 }]
-set_property -dict { PACKAGE_PIN T4 DRIVE 8 IOSTANDARD LVCMOS33 } [get_ports { IOB1 }]
+set_property -dict { PACKAGE_PIN T2 DRIVE 8 IOSTANDARD LVCMOS33 } [get_ports { IOA8 }];
+set_property -dict { PACKAGE_PIN T3 DRIVE 8 IOSTANDARD LVCMOS33 } [get_ports { IOB0 }];
+set_property -dict { PACKAGE_PIN T4 DRIVE 8 IOSTANDARD LVCMOS33 } [get_ports { IOB1 }];
## Buttons
set_property -dict { PACKAGE_PIN R1 IOSTANDARD LVCMOS33 } [get_ports { POR_N }]; #pushbutton
@@ -21,15 +21,22 @@
set_property -dict { PACKAGE_PIN K15 IOSTANDARD LVCMOS33 } [get_ports { IOA2 }]; #sw3
set_property -dict { PACKAGE_PIN L14 IOSTANDARD LVCMOS33 } [get_ports { IOA3 }]; #sw4
-## SPI/JTAG
-set_property -dict { PACKAGE_PIN L2 IOSTANDARD LVCMOS33 } [get_ports { SPI_DEV_CLK }]; #SCK (USB_A13)
-set_property -dict { PACKAGE_PIN J3 IOSTANDARD LVCMOS33 } [get_ports { SPI_DEV_D0 }]; #SDI (USB_A14)
-set_property -dict { PACKAGE_PIN B2 IOSTANDARD LVCMOS33 } [get_ports { SPI_DEV_D1 }]; #SDO (USB_A15)
-set_property -dict { PACKAGE_PIN C7 IOSTANDARD LVCMOS33 } [get_ports { SPI_DEV_CS_L }]; #CSB (USB_A16)
-set_property -dict { PACKAGE_PIN C6 IOSTANDARD LVCMOS33 } [get_ports { IOB9 }]; #JTAG TRST (USB_A17)
-set_property -dict { PACKAGE_PIN D6 IOSTANDARD LVCMOS33 PULLTYPE PULLUP } [get_ports { IO_JSRST_N }]; #JTAG SRST (USB_A18)
-set_property -dict { PACKAGE_PIN C4 IOSTANDARD LVCMOS33 PULLTYPE PULLDOWN } [get_ports { IOB7 }]; #JTAG/SPI (USB_A19)
-set_property -dict { PACKAGE_PIN D5 IOSTANDARD LVCMOS33 PULLTYPE PULLDOWN } [get_ports { IOB8 }]; #Bootstrap (USB_A20)
+## SPI / JTAG (part of it, other JTAG signals further below)
+set_property -dict { PACKAGE_PIN E2 IOSTANDARD LVCMOS33 } [get_ports { SPI_DEV_CLK }]; #USB_A9(SAM3X)
+set_property -dict { PACKAGE_PIN D1 IOSTANDARD LVCMOS33 } [get_ports { SPI_DEV_D0 }]; #USB_A10 (SAM3X)
+set_property -dict { PACKAGE_PIN C1 IOSTANDARD LVCMOS33 } [get_ports { SPI_DEV_D1 }]; #USB_A11 (SAM3X)
+set_property -dict { PACKAGE_PIN K3 IOSTANDARD LVCMOS33 } [get_ports { SPI_DEV_CS_L }]; #USB_A12 (SAM3X)
+
+# JTAG (second part)
+set_property -dict { PACKAGE_PIN L2 IOSTANDARD LVCMOS33 PULLTYPE PULLUP } [get_ports { IOR4 }]; #USB_A13 (SAM3X)
+set_property -dict { PACKAGE_PIN J3 IOSTANDARD LVCMOS33 PULLTYPE PULLUP } [get_ports { IO_JSRST_N }]; #USB_A14 (SAM3X)
+# SW Straps
+set_property -dict { PACKAGE_PIN B2 IOSTANDARD LVCMOS33 PULLTYPE PULLDOWN } [get_ports { IOC0 }]; #USB_A15 (SAM3X)
+set_property -dict { PACKAGE_PIN C7 IOSTANDARD LVCMOS33 PULLTYPE PULLDOWN } [get_ports { IOC1 }]; #USB_A16 (SAM3X)
+set_property -dict { PACKAGE_PIN C6 IOSTANDARD LVCMOS33 PULLTYPE PULLDOWN } [get_ports { IOC2 }]; #USB_A17 (SAM3X)
+# TAP Straps
+set_property -dict { PACKAGE_PIN D6 IOSTANDARD LVCMOS33 PULLTYPE PULLDOWN } [get_ports { IOC8 }]; #USB_A18 (SAM3X)
+set_property -dict { PACKAGE_PIN C4 IOSTANDARD LVCMOS33 PULLTYPE PULLDOWN } [get_ports { IOC5 }]; #USB_A19 (SAM3X)
## OTHER IO
set_property -dict { PACKAGE_PIN B16 IOSTANDARD LVCMOS33 } [get_ports { IOA4 }]; #JP3.B16
@@ -75,7 +82,7 @@
#set_property PACKAGE_PIN K1 [get_ports {usb_data[6]}]
#set_property PACKAGE_PIN K2 [get_ports {usb_data[7]}]
-#set_property PACKAGE_PIN F4 [get_ports {usb_addr[0]}]
+#set_property PACKAGE_PIN F4 [get_ports {usb_addr[0]]]
#set_property PACKAGE_PIN G5 [get_ports {usb_addr[1]}]
#set_property PACKAGE_PIN J1 [get_ports {usb_addr[2]}]
#set_property PACKAGE_PIN H1 [get_ports {usb_addr[3]}]
diff --git a/hw/top_englishbreakfast/data/top_englishbreakfast.hjson b/hw/top_englishbreakfast/data/top_englishbreakfast.hjson
index 4645f2f..1d204fe 100644
--- a/hw/top_englishbreakfast/data/top_englishbreakfast.hjson
+++ b/hw/top_englishbreakfast/data/top_englishbreakfast.hjson
@@ -913,9 +913,9 @@
'SPI_HOST_D0', 'SPI_HOST_D1', 'SPI_HOST_D2', 'SPI_HOST_D3',
'FLASH_TEST_VOLT',
'FLASH_TEST_MODE0', 'FLASH_TEST_MODE1',
- 'IOB10', 'IOB11', 'IOB12',
- 'IOC0', 'IOC1', 'IOC2', 'IOC5', 'IOC6', 'IOC7', 'IOC8', 'IOC9', 'IOC10', 'IOC11', 'IOC12',
- 'IOR0', 'IOR1', 'IOR2', 'IOR3', 'IOR4', 'IOR5', 'IOR6', 'IOR7', 'IOR10', 'IOR11', 'IOR12', 'IOR13'
+ 'IOB7', 'IOB8', 'IOB9', 'IOB10', 'IOB11', 'IOB12',
+ 'IOC6', 'IOC7', 'IOC9', 'IOC10', 'IOC11', 'IOC12',
+ 'IOR0', 'IOR1', 'IOR2', 'IOR3', 'IOR5', 'IOR6', 'IOR7', 'IOR10', 'IOR11', 'IOR12', 'IOR13'
],
add_pads: [
@@ -936,14 +936,14 @@
pinmux: {
special_signals: [
// Straps
- { name: 'tap0', pad: 'IOC0' , desc: 'TAP strap signal, maps to a stubbed-off MIO.' },
- { name: 'tap1', pad: 'IOB7', desc: 'TAP strap signal, maps to MIO pad 16.' },
- { name: 'dft0', pad: 'IOC1' , desc: 'DFT strap signal, maps to a stubbed-off MIO.' },
- { name: 'dft1', pad: 'IOC12', desc: 'DFT strap signal, maps to a stubbed-off MIO.' },
+ { name: 'tap0', pad: 'IOC8', desc: 'TAP strap signal.' },
+ { name: 'tap1', pad: 'IOC5', desc: 'TAP strap signal.' },
+ { name: 'dft0', pad: 'IOC3', desc: 'DFT strap signal.' },
+ { name: 'dft1', pad: 'IOC4', desc: 'DFT strap signal.' },
// JTAG
{ name: 'tck', pad: 'SPI_DEV_CLK' , desc: 'JTAG tck signal, overlaid on SPI_DEV.' },
{ name: 'tms', pad: 'SPI_DEV_CS_L', desc: 'JTAG tms signal, overlaid on SPI_DEV.' },
- { name: 'trst_n', pad: 'IOB9' , desc: 'JTAG trst_n signal, maps to MIO pad 18.' },
+ { name: 'trst_n', pad: 'IOR4', desc: 'JTAG trst_n signal.' },
{ name: 'tdi', pad: 'SPI_DEV_D0' , desc: 'JTAG tdi signal, overlaid on SPI_DEV.' },
{ name: 'tdo', pad: 'SPI_DEV_D1' , desc: 'JTAG tdo signal, overlaid on SPI_DEV.' },
],
