commit c417986aa506188c2b5b6bf139cf8cf38590c190
author Silvestrs Timofejevs <silvestrst@lowrisc.org> Tue Feb 18 08:33:31 2020 +0000
committer Garret Kelly <Garret.Kelly@gmail.com> Tue Feb 18 09:53:37 2020 -0500
tree 12e4c13aad4f8f59e5a1e806864fbfe5a67fa998
parent dd376a3da2e384bbc821113a16475aac574f0a89

[sw, dif_uart] Fix misuse of __builtin_unreachable

uart_irq_offset_get() used __builtin_unreachable in it's default case,
which is a not appropriate use for it (is reachable, and getting into
the default case is an error).

Signed-off-by: Silvestrs Timofejevs <silvestrst@lowrisc.org>

sw/device/lib/dif/dif_uart.c

diff --git a/sw/device/lib/dif/dif_uart.c b/sw/device/lib/dif/dif_uart.c
index 9bf1ed6..3f912f2 100644
--- a/sw/device/lib/dif/dif_uart.c
+++ b/sw/device/lib/dif/dif_uart.c
@@ -43,7 +43,8 @@
  * and INTR_TEST registers have the same bit offsets, so this routine can be
  * reused.
  */
-static ptrdiff_t uart_irq_offset_get(dif_uart_interrupt_t irq_type) {
+static bool uart_irq_offset_get(dif_uart_interrupt_t irq_type,
+                                ptrdiff_t *offset_out) {
   ptrdiff_t offset;
   switch (irq_type) {
     case kDifUartInterruptTxWatermark:
@@ -71,10 +72,12 @@
       offset = UART_INTR_STATE_RX_PARITY_ERR;
       break;
     default:
-      __builtin_unreachable();
+      return false;
   }
 
-  return offset;
+  *offset_out = offset;
+
+  return true;
 }
 
 /**
@@ -306,8 +309,12 @@
     return false;
   }
 
+  ptrdiff_t offset;
+  if (!uart_irq_offset_get(irq_type, &offset)) {
+    return false;
+  }
+
   // Get the requested interrupt state (enabled/disabled)
-  ptrdiff_t offset = uart_irq_offset_get(irq_type);
   bool enabled = mmio_region_get_bit32(uart->base_addr,
                                        UART_INTR_STATE_REG_OFFSET, offset);
   if (enabled) {
@@ -325,8 +332,12 @@
     return false;
   }
 
+  ptrdiff_t offset;
+  if (!uart_irq_offset_get(irq_type, &offset)) {
+    return false;
+  }
+
   // Writing to the register clears the corresponding bits
-  ptrdiff_t offset = uart_irq_offset_get(irq_type);
   mmio_region_nonatomic_set_bit32(uart->base_addr, UART_INTR_STATE_REG_OFFSET,
                                   offset);
 
@@ -370,8 +381,12 @@
     return false;
   }
 
+  ptrdiff_t offset;
+  if (!uart_irq_offset_get(irq_type, &offset)) {
+    return false;
+  }
+
   // Enable/disable the requested interrupt
-  ptrdiff_t offset = uart_irq_offset_get(irq_type);
   if (enable == kDifUartEnable) {
     mmio_region_nonatomic_set_bit32(uart->base_addr,
                                     UART_INTR_ENABLE_REG_OFFSET, offset);
@@ -388,8 +403,12 @@
     return false;
   }
 
+  ptrdiff_t offset;
+  if (!uart_irq_offset_get(irq_type, &offset)) {
+    return false;
+  }
+
   // Force the requested interrupt
-  ptrdiff_t offset = uart_irq_offset_get(irq_type);
   mmio_region_nonatomic_set_bit32(uart->base_addr, UART_INTR_TEST_REG_OFFSET,
                                   offset);