[csrng/rtl] sw port data attack check added
For the software port only, the returned genbits will have a repeated data check before genbits are returned to the register interface.
Signed-off-by: Mark Branstad <mark.branstad@wdc.com>
diff --git a/hw/ip/csrng/data/csrng.hjson b/hw/ip/csrng/data/csrng.hjson
index 905e554..bdaf73a 100644
--- a/hw/ip/csrng/data/csrng.hjson
+++ b/hw/ip/csrng/data/csrng.hjson
@@ -316,6 +316,14 @@
Writing a zero resets this status bit.
'''
}
+ { bits: "12",
+ name: "CS_BUS_CMP_ALERT",
+ desc: '''
+ This bit is set when the software application port genbits bus value is equal
+ to the prior valid value on the bus, indicating a possible attack.
+ Writing a zero resets this status bit.
+ '''
+ }
]
},
{
