Better document where to change UART baud rates
Changing the UART baud rate in Verilator builds must be done in two
places, better document those.
Signed-off-by: Philipp Wagner <phw@lowrisc.org>
diff --git a/hw/top_earlgrey/rtl/top_earlgrey_verilator.sv b/hw/top_earlgrey/rtl/top_earlgrey_verilator.sv
index df80abe..5cb8b9e 100644
--- a/hw/top_earlgrey/rtl/top_earlgrey_verilator.sv
+++ b/hw/top_earlgrey/rtl/top_earlgrey_verilator.sv
@@ -150,10 +150,9 @@
);
// UART DPI
- // The baud rate set to match FPGA implementation; the frequency is
- // "artificial".
- // Both baud rate and frequency must match the settings used in the on-chip
- // software.
+ // The baud rate set to match FPGA implementation; the frequency is "artificial". Both baud rate
+ // frequency must match the settings used in the on-chip software at
+ // `sw/device/lib/arch/device_sim_verilator.c`.
uartdpi #(
.BAUD('d7_200),
.FREQ('d500_000)
diff --git a/sw/device/lib/arch/device_sim_verilator.c b/sw/device/lib/arch/device_sim_verilator.c
index 0f30c6d..2d0d9fe 100644
--- a/sw/device/lib/arch/device_sim_verilator.c
+++ b/sw/device/lib/arch/device_sim_verilator.c
@@ -11,6 +11,8 @@
const device_type_t kDeviceType = kDeviceSimVerilator;
+// Changes to the clock frequency or UART baud rate must also be reflected at
+// `hw/top_earlgrey/rtl/top_earlgrey_verilator.sv`.
const uint64_t kClockFreqCpuHz = 500 * 1000; // 500kHz
const uint64_t kClockFreqPeripheralHz = 125 * 1000; // 125kHz
