commit | 671374917415314f6fdf2bed82757f7c91a28dcb | [log] [tgz] |
---|---|---|
author | Timothy Trippel <ttrippel@google.com> | Fri Sep 24 22:54:13 2021 +0000 |
committer | moidx <migue48@gmail.com> | Mon Sep 27 09:19:23 2021 -0700 |
tree | 512fdb8f3147ef519f5d5b0f06ed10a84046c9d8 | |
parent | 2280cadd3530b47ca6d56d62d00d9c36cf438ae6 [diff] |
[dif/gpio] added autogen'd GPIO IRQ DIFs This partially addresses #8142. Note, the GPIO IP can raise 32 different IRQs (one for each GPIO pin), however, the HJSON lists this as a single interrupt with a width of 32. As a result, the autogen DIF templates and script had to be updated to accomodate this subtle difference. Additionally, in the process of accomplishing the above, a very minor bug was found in the unit test template that was fixed, resulting in the regeneration of the UART IRQ DIFs. Signed-off-by: Timothy Trippel <ttrippel@google.com>
OpenTitan is an open source silicon Root of Trust (RoT) project. OpenTitan will make the silicon RoT design and implementation more transparent, trustworthy, and secure for enterprises, platform providers, and chip manufacturers. OpenTitan is administered by lowRISC CIC as a collaborative project to produce high quality, open IP for instantiation as a full-featured product. See the OpenTitan site and OpenTitan docs for more information about the project.
This repository contains hardware, software and utilities written as part of the OpenTitan project. It is structured as monolithic repository, or “monorepo”, where all components live in one repository. It exists to enable collaboration across partners participating in the OpenTitan project.
The project contains comprehensive documentation of all IPs and tools. You can access it online at docs.opentitan.org.
Have a look at CONTRIBUTING and our documentation on project organization and processes for guidelines on how to contribute code to this repository.
Unless otherwise noted, everything in this repository is covered by the Apache License, Version 2.0 (see LICENSE for full text).