| commit | bc3a8885fe5af9192368b3630ae7ad87a17cd94e | [log] [tgz] |
|---|---|---|
| author | Eunchan Kim <eunchan@opentitan.org> | Thu Apr 14 15:58:39 2022 -0700 |
| committer | Eunchan Kim <github@eunchan.kim> | Fri Apr 15 13:44:53 2022 -0700 |
| tree | aae0e804000d98008f7d23a41f7f4aed1bae762e | |
| parent | 76fa20fc6874390c8106db7d331c8002549d9443 [diff] |
[spi_device] Add WE set/clear logic to Status module This commit revises spid_status module to allow other modules to set/ clear WEL bit in STATUS register. This commit also revises the SW updation logic to ensure the atomicity of the STATUS register from the host system point of view. The STATUS that the host system sees is updated when a SPI transaction is completed. Any SW update of STATUS will be applied to the STATUS register during a SPI transaction after going through an asynchronous FIFO then visiable to the host system in following transactions. It means that at the very first transaction, the STATUS is always reset value (in current design all zero). Signed-off-by: Eunchan Kim <eunchan@opentitan.org>
OpenTitan is an open source silicon Root of Trust (RoT) project. OpenTitan will make the silicon RoT design and implementation more transparent, trustworthy, and secure for enterprises, platform providers, and chip manufacturers. OpenTitan is administered by lowRISC CIC as a collaborative project to produce high quality, open IP for instantiation as a full-featured product. See the OpenTitan site and OpenTitan docs for more information about the project.
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