| commit | baca45799b651b03c1af064876cc64c7dae54847 | [log] [tgz] |
|---|---|---|
| author | Michael Schaffner <msf@google.com> | Fri Jul 23 18:17:58 2021 -0700 |
| committer | Michael Schaffner <msf@google.com> | Mon Aug 02 17:44:20 2021 -0700 |
| tree | 8355d8282fe322f49b6a4c5caec79f858716784c | |
| parent | 79d57e707b76e5db5a27c99d1c8f70b63c69ff01 [diff] |
[tlul_adapter_sram] Fix minor bugs in byte write logic This fixes a few bugs in the byte write logic and adds a workaround for potential RAW hazards that can occur when the byte write logic is employed together with prim_ram_1p_scr. This workaround should be removed once the DV environment of sram_ctrl is able to handle these corner cases (#7461). Signed-off-by: Michael Schaffner <msf@google.com>
OpenTitan is an open source silicon Root of Trust (RoT) project. OpenTitan will make the silicon RoT design and implementation more transparent, trustworthy, and secure for enterprises, platform providers, and chip manufacturers. OpenTitan is administered by lowRISC CIC as a collaborative project to produce high quality, open IP for instantiation as a full-featured product. See the OpenTitan site and OpenTitan docs for more information about the project.
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