| commit | b8f24c49177d388d43a1a5e438b7b6709b8095fe | [log] [tgz] |
|---|---|---|
| author | Pirmin Vogel <vogelpi@lowrisc.org> | Fri Jan 21 21:47:47 2022 +0100 |
| committer | Pirmin Vogel <vogelpi@lowrisc.org> | Mon Jan 24 22:00:04 2022 +0100 |
| tree | 9d41531aee612afda65fe608e2c08c8eb02b54a2 | |
| parent | 65fe5bbda9f9959141b686c85943ee64a649e3f1 [diff] |
[top_englishbreakfast] Disconnect system bus access of debug module This commit removes the rv_dm.sba port on the main interconnect to free up some FPGA logic resources on the CW305. Signed-off-by: Pirmin Vogel <vogelpi@lowrisc.org>
OpenTitan is an open source silicon Root of Trust (RoT) project. OpenTitan will make the silicon RoT design and implementation more transparent, trustworthy, and secure for enterprises, platform providers, and chip manufacturers. OpenTitan is administered by lowRISC CIC as a collaborative project to produce high quality, open IP for instantiation as a full-featured product. See the OpenTitan site and OpenTitan docs for more information about the project.
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