commit b610308d54a6469df3443ad3636b704be8014662
author Weicai Yang <weicai@google.com> Mon Dec 14 10:58:03 2020 -0800
committer weicaiyang <49293026+weicaiyang@users.noreply.github.com> Mon Dec 14 18:49:12 2020 -0800
tree 6ecc6b1faa035b9fe858370f1e1bcf921c0f525f
parent 6d3d6a06154f54d0ae9956237cbf91f5ffb4c725

[dvsim] Fix publish report path

Move `self.rel_path` before `self._process_overrides()` to fix
`rel_path` is empty in hjson file

Fix below highlighted path
VERBOSE: [FlowCfg] CLOUDSDK_PYTHON=/usr/bin/python2.7 /usr/bin/gsutil cp /edascratch/weicai-opentitan/ot/uart.sim.vcs/try_publish/results_Mon.12.14.20__06.57.39PM.html gs://reports.opentitan.org/**hw/ip/uart/dv**/latest/results.html;

Signed-off-by: Weicai Yang <weicai@google.com>

util/dvsim/FlowCfg.py

diff --git a/util/dvsim/FlowCfg.py b/util/dvsim/FlowCfg.py
index 88ccc36..b23da23 100644
--- a/util/dvsim/FlowCfg.py
+++ b/util/dvsim/FlowCfg.py
@@ -124,6 +124,10 @@
             for entry in self.use_cfgs:
                 self._load_child_cfg(entry, mk_config)
 
+        if self.rel_path == "":
+            self.rel_path = os.path.dirname(self.flow_cfg_file).replace(
+                self.proj_root + '/', '')
+
         # Process overrides before substituting wildcards
         self._process_overrides()
 
@@ -132,10 +136,6 @@
         # _expand and add the code at the start.
         self._expand()
 
-        if self.rel_path == "":
-            self.rel_path = os.path.dirname(self.flow_cfg_file).replace(
-                self.proj_root + '/', '')
-
         # Run any final checks
         self._post_init()