| commit | b35a340e8939d51bac1842b5edd72782286a8c04 | [log] [tgz] |
|---|---|---|
| author | Timothy Chen <timothytim@google.com> | Tue Jun 23 00:14:11 2020 -0700 |
| committer | tjaychen <timothytim@google.com> | Tue Jun 23 12:20:10 2020 -0700 |
| tree | 6104a66c53700a6fc65ea6779c65f48ad606681c | |
| parent | 244ccebd23eeb2b1bdae70e911d6252174f4c258 [diff] |
[flash] Design updates and clean-up - Clean-up and fix the usage of sizing parameters. Previous design represented flash sizes in bus words, leading to an incorrect alignment of page boundaries. This PR changes the parameters to flash word size base and explicitly declares the bus widths separately. - Also add an arbiter count between host and controller arbitration. Since host reads are critical to performance, the past design always favored hosts, with the understanding under the right access patterns this could lead to deadlock. Recent system changes indeed led to such an arbitration starvation, so a counter is added to ensure controller will not be starved. - Round robin is still not preferred because controller does not need access priority as long as it can "eventually" finish. Signed-off-by: Timothy Chen <timothytim@google.com>
OpenTitan is an open source silicon Root of Trust (RoT) project. OpenTitan will make the silicon RoT design and implementation more transparent, trustworthy, and secure for enterprises, platform providers, and chip manufacturers. OpenTitan is administered by lowRISC CIC as a collaborative project to produce high quality, open IP for instantiation as a full-featured product. See the OpenTitan site and OpenTitan docs for more information about the project.
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