commit b29eaae6455de536ba03cd00c5f8efcedc12e9fe
author Alphan Ulusoy <alphan@google.com> Tue Sep 06 17:29:41 2022 -0400
committer Alphan Ulusoy <alphan@google.com> Tue Sep 06 20:49:21 2022 -0400
tree eb213e4daf1e0430168f034d9a55ac181c2f0b88
parent 2258e3c758340097b28a63ea5914362c6d55663b

[test] Fix rom_e2e_bootstrap_enabled_not_requested

This commit updates `rom_e2e_bootstrap_enabled_not_requested` (#14451)
to use `READ_SFDP` instead of `READ_STATUS` to verify that the target is
not in bootstrap mode.

CIPO line is in high-Z mode when CMD_INFO registers are not configured.
Thus, we use `READ_STATUS` to avoid false negatives when bootstrap is
not requested.

Signed-off-by: Alphan Ulusoy <alphan@google.com>

sw/device/silicon_creator/rom/data/rom_testplan.hjson

diff --git a/sw/device/silicon_creator/rom/data/rom_testplan.hjson b/sw/device/silicon_creator/rom/data/rom_testplan.hjson
index 0839d33..a85b33e 100644
--- a/sw/device/silicon_creator/rom/data/rom_testplan.hjson
+++ b/sw/device/silicon_creator/rom/data/rom_testplan.hjson
@@ -147,8 +147,7 @@
             - Reset the chip.
             - Verify that the chip outputs the expected `BFV`: `0142500d` over UART.
               - ROM will continously reset the chip and output the same `BFV`.
-            - Verify that the chip does not respond to `READ_STATUS` (`0x05`).
-              - The data on the CIPO line must be `0xff`.
+            - Verify that the chip does not respond to `READ_SFDP` (`0x5a`).
             '''
       tags: ["rom", "verilator", "dv", "fpga", "silicon"]
       stage: V2

sw/host/tests/rom/e2e_bootstrap_entry/src/main.rs

diff --git a/sw/host/tests/rom/e2e_bootstrap_entry/src/main.rs b/sw/host/tests/rom/e2e_bootstrap_entry/src/main.rs
index c9a6986..273ea42 100644
--- a/sw/host/tests/rom/e2e_bootstrap_entry/src/main.rs
+++ b/sw/host/tests/rom/e2e_bootstrap_entry/src/main.rs
@@ -4,12 +4,15 @@
 
 use anyhow::{bail, Result};
 use regex::Regex;
+use std::matches;
 use std::time::Duration;
 use structopt::StructOpt;
 
 use opentitanlib::app::TransportWrapper;
 use opentitanlib::execute_test;
-use opentitanlib::spiflash::{BlockEraseSize, SpiFlash, SupportedAddressModes, WriteGranularity};
+use opentitanlib::spiflash::{
+    sfdp, BlockEraseSize, SpiFlash, SupportedAddressModes, WriteGranularity,
+};
 use opentitanlib::test_utils::init::InitializeTest;
 use opentitanlib::uart::console::{ExitStatus, UartConsole};
 use opentitanlib::util::parse_int::ParseInt;
@@ -107,12 +110,21 @@
         }
     };
 
-    // Now check whether the SPI device is responding to status messages
+    // Now check whether the SPI device is responding to status messages.
+    // Note: CIPO line is in high-z state when CMD_INFO registers are not configured.
+    // Use READ_SFDP instead of READ_STATUS to avoid false negatives when bootstrap is not
+    // requested
     let spi = transport.spi("0")?;
     let status = SpiFlash::read_status(&*spi)?;
     match request {
-        BootstrapRequest::No => assert_eq!(status, 0xff),
         BootstrapRequest::Yes => assert_eq!(status, 0x00),
+        BootstrapRequest::No => assert!(matches!(
+            SpiFlash::read_sfdp(&*spi)
+                .unwrap_err()
+                .downcast::<sfdp::Error>()
+                .unwrap(),
+            sfdp::Error::WrongHeaderSignature(..)
+        )),
     }
     Ok(())
 }