commit b19dec1b90e724341fbd24f2646d96d1e968407f
author Pirmin Vogel <vogelpi@lowrisc.org> Fri Oct 22 16:16:37 2021 +0200
committer Pirmin Vogel <vogelpi@lowrisc.org> Mon Oct 25 09:14:12 2021 +0200
tree 217ed3a392f17f99e89b4e2366e1d110416086ca
parent 0046b1e5f3044fe926016f93896f4888b8cae210

[aes/pre_syn] Re-enable Yosys synthesis

This commit causes `prim_sec_anchor_*` primitives to be replaced by
the corresponding Xilinx primitives before calling Yosys.

Signed-off-by: Pirmin Vogel <vogelpi@lowrisc.org>

hw/ip/aes/pre_syn/syn_yosys.sh

diff --git a/hw/ip/aes/pre_syn/syn_yosys.sh b/hw/ip/aes/pre_syn/syn_yosys.sh
index e0a3d53..6cb3521 100755
--- a/hw/ip/aes/pre_syn/syn_yosys.sh
+++ b/hw/ip/aes/pre_syn/syn_yosys.sh
@@ -104,7 +104,9 @@
     # where available.
     sed -i 's/prim_flop_2sync/prim_generic_flop_2sync/g' $LR_SYNTH_OUT_DIR/generated/${module}.v
     sed -i 's/prim_flop/prim_xilinx_flop/g'              $LR_SYNTH_OUT_DIR/generated/${module}.v
+    sed -i 's/prim_sec_anchor_flop/prim_xilinx_flop/g'   $LR_SYNTH_OUT_DIR/generated/${module}.v
     sed -i 's/prim_buf/prim_xilinx_buf/g'                $LR_SYNTH_OUT_DIR/generated/${module}.v
+    sed -i 's/prim_sec_anchor_buf/prim_xilinx_buf/g'     $LR_SYNTH_OUT_DIR/generated/${module}.v
     sed -i 's/prim_xor2/prim_xilinx_xor2/g'              $LR_SYNTH_OUT_DIR/generated/${module}.v
 done
 
@@ -129,7 +131,9 @@
     # where available.
     sed -i 's/prim_flop_2sync/prim_generic_flop_2sync/g' $LR_SYNTH_OUT_DIR/generated/${module}.v
     sed -i 's/prim_flop/prim_xilinx_flop/g'              $LR_SYNTH_OUT_DIR/generated/${module}.v
+    sed -i 's/prim_sec_anchor_flop/prim_xilinx_flop/g'   $LR_SYNTH_OUT_DIR/generated/${module}.v
     sed -i 's/prim_buf/prim_xilinx_buf/g'                $LR_SYNTH_OUT_DIR/generated/${module}.v
+    sed -i 's/prim_sec_anchor_buf/prim_xilinx_buf/g'     $LR_SYNTH_OUT_DIR/generated/${module}.v
     sed -i 's/prim_xor2/prim_xilinx_xor2/g'              $LR_SYNTH_OUT_DIR/generated/${module}.v
 done