| commit | e351a8fcecd435524dc795d1e03f6969afb80d53 | [log] [tgz] |
|---|---|---|
| author | Weicai Yang <weicai@google.com> | Tue Nov 23 16:43:56 2021 -0800 |
| committer | tjaychen <timothytim@google.com> | Fri Dec 03 18:54:25 2021 -0800 |
| tree | c30523a108786ef8de72c53c952b23871e9df1fc | |
| parent | 17d05fcf689487654b6e494d1bc922c080f5ef14 [diff] |
[chip/dv] Generate TLUL data intg for top-level CSR tests Addressed #7966 In chip level stub_cpu mode, TB needs to generate data intg as data intg is generated in Ibex and we bypass the Ibex to drive the TL interface. For cmd intg, we force it to random value as it can be generated in the design data path. Signed-off-by: Weicai Yang <weicai@google.com>
OpenTitan is an open source silicon Root of Trust (RoT) project. OpenTitan will make the silicon RoT design and implementation more transparent, trustworthy, and secure for enterprises, platform providers, and chip manufacturers. OpenTitan is administered by lowRISC CIC as a collaborative project to produce high quality, open IP for instantiation as a full-featured product. See the OpenTitan site and OpenTitan docs for more information about the project.
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