| commit | c6feb6ec728dc99bc6479c40b8186b7b2d29aed1 | [log] [tgz] |
|---|---|---|
| author | Srikrishna Iyer <sriyer@google.com> | Thu Jun 10 17:40:38 2021 -0700 |
| committer | Srikrishna Iyer <46467186+sriyerg@users.noreply.github.com> | Mon Jun 14 20:52:31 2021 -0700 |
| tree | e4f49c0abd1acec560606b4c3d9f261bf39f6587 | |
| parent | 6acb77994f07c443347f3a3c34a8df334dc11f43 [diff] |
[dv, mem_bkdr_util] Address #6850 comments This commit address 2 comments: - Add enum that encompasses `prim_secded_e` and adds parity and none to it, so that we can set the error detection scheme as a single enum var. - Macrofy the repeated addr and data width checks Signed-off-by: Srikrishna Iyer <sriyer@google.com>
OpenTitan is an open source silicon Root of Trust (RoT) project. OpenTitan will make the silicon RoT design and implementation more transparent, trustworthy, and secure for enterprises, platform providers, and chip manufacturers. OpenTitan is administered by lowRISC CIC as a collaborative project to produce high quality, open IP for instantiation as a full-featured product. See the OpenTitan site and OpenTitan docs for more information about the project.
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